From: "Peter Wang (王信友)" <peter.wang@mediatek.com>
To: "beanhuo@micron.com" <beanhuo@micron.com>,
"huobean@gmail.com" <huobean@gmail.com>,
"avri.altman@wdc.com" <avri.altman@wdc.com>,
"quic_nitirawa@quicinc.com" <quic_nitirawa@quicinc.com>,
"bvanassche@acm.org" <bvanassche@acm.org>,
"alim.akhtar@samsung.com" <alim.akhtar@samsung.com>,
"andre.draszik@linaro.org" <andre.draszik@linaro.org>,
"martin.petersen@oracle.com" <martin.petersen@oracle.com>,
"mani@kernel.org" <mani@kernel.org>,
"James.Bottomley@HansenPartnership.com"
<James.Bottomley@HansenPartnership.com>
Cc: "linux-scsi@vger.kernel.org" <linux-scsi@vger.kernel.org>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
"quic_pkambar@quicinc.com" <quic_pkambar@quicinc.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V1] ufs: core: Fix interrupt handling for MCQ Mode in ufshcd_intr
Date: Thu, 31 Jul 2025 09:22:46 +0000 [thread overview]
Message-ID: <cd2282911c3479fb247280a1c9a2b85fa45be370.camel@mediatek.com> (raw)
In-Reply-To: <d0677ace-0f01-4111-8f00-868d83550b65@acm.org>
On Wed, 2025-07-30 at 09:04 -0700, Bart Van Assche wrote:
>
> Hi Peter,
>
> Thanks for having taken a look but I think that you misunderstood my
> patch. My patch does not modify the behavior of the UFS driver on
> systems using the legacy single doorbell mode. It only modifies the
> behavior on systems supporting MCQ. And on systems that support MCQ,
> it
> restores the behavior from before when commit 3c7ac40d7322 ("scsi:
> ufs:
> core: Delegate the interrupt service routine to a threaded IRQ
> handler")
> got merged.
>
> On MCQ systems, if the completion interrupt is processed by the CPU
> core
> that submitted the I/O, then I/O workloads are self-regulating. The
> more
> time that is spent in the completion interrupt handler, the more the
> submitter will be slowed down. This is not the case in legacy single
> doorbell mode since when using that mode all completion interrupts
> are
> processed by a single CPU core.
>
> Bart.
Hi Bart,
I am fully agree that your patch is 100% correct.
But what I want to express is that this is a patch
that makes me feel confused about the code.
Originally, ufshcd_intr moved some heavy (legacy) work
to ufshcd_threaded_intr because those work could take
a long time to execute and affect other module IRQs.
This means, in terms of execution time, ufshcd_threaded_intr
could be longer than ufshcd_intr. But if ufshcd_intr calls
ufshcd_threaded_intr, then the execution time of
ufshcd_intr becomes equal to ufshcd_threaded_intr,
and that’s the part confuses me.
Of course, if you look deeper into ufshcd_threaded_intr,
you'll see that in MCQ mode, it doesn’t actually run for
very long time. But compared to this patch, the readability
would be a bit worse. So I prefer this patch.
Thanks
Peter
next prev parent reply other threads:[~2025-07-31 9:23 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-28 22:57 Nitin Rawat
2025-07-28 23:41 ` Bart Van Assche
2025-07-29 14:37 ` Nitin Rawat
2025-07-29 16:24 ` Bart Van Assche
2025-07-30 6:41 ` Peter Wang (王信友)
2025-07-30 16:04 ` Bart Van Assche
2025-07-31 9:22 ` Peter Wang (王信友) [this message]
2025-07-31 8:27 ` neil.armstrong
2025-08-06 1:54 ` Martin K. Petersen
2025-07-31 16:52 ` Bart Van Assche
2025-08-01 7:31 ` Peter Wang (王信友)
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