From: "Martin K. Petersen" <martin.petersen@oracle.com>
To: neil.armstrong@linaro.org
Cc: Nitin Rawat <quic_nitirawa@quicinc.com>,
alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org,
James.Bottomley@HansenPartnership.com, huobean@gmail.com,
mani@kernel.org, martin.petersen@oracle.com, beanhuo@micron.com,
peter.wang@mediatek.com, andre.draszik@linaro.org,
linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org,
linux-kernel@vger.kernel.org,
Palash Kambar <quic_pkambar@quicinc.com>
Subject: Re: [PATCH V1] ufs: core: Fix interrupt handling for MCQ Mode in ufshcd_intr
Date: Tue, 05 Aug 2025 21:54:28 -0400 [thread overview]
Message-ID: <yq1qzxpb4fs.fsf@ca-mkp.ca.oracle.com> (raw)
In-Reply-To: <0f3a7ae4-08a1-401a-a41e-cb8db530de36@linaro.org> (neil armstrong's message of "Thu, 31 Jul 2025 10:27:51 +0200")
>> Commit 3c7ac40d7322 ("scsi: ufs: core: Delegate the interrupt service
>> routine to a threaded IRQ handler") introduced a regression where the
>> UFS interrupt status register (IS) was not cleared in ufshcd_intr()
>> when operating in MCQ mode. As a result, the IS register remained
>> uncleared.
Applied to 6.17/scsi-staging, thanks!
--
Martin K. Petersen
next prev parent reply other threads:[~2025-08-06 1:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-28 22:57 Nitin Rawat
2025-07-28 23:41 ` Bart Van Assche
2025-07-29 14:37 ` Nitin Rawat
2025-07-29 16:24 ` Bart Van Assche
2025-07-30 6:41 ` Peter Wang (王信友)
2025-07-30 16:04 ` Bart Van Assche
2025-07-31 9:22 ` Peter Wang (王信友)
2025-07-31 8:27 ` neil.armstrong
2025-08-06 1:54 ` Martin K. Petersen [this message]
2025-07-31 16:52 ` Bart Van Assche
2025-08-01 7:31 ` Peter Wang (王信友)
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