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From: "Stefan Riedmüller" <s.riedmueller@phytec.de>
To: Rob Herring <robh@kernel.org>
Cc: "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
	Andrew Smirnov <andrew.smirnov@gmail.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	NXP Linux Team <linux-imx@nxp.com>
Subject: Re: [PATCH 1/2] dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL devicetree bindings
Date: Fri, 16 Aug 2019 13:42:38 +0200	[thread overview]
Message-ID: <cda26fbd-c683-d285-dc52-825d5e16a9e1@phytec.de> (raw)
In-Reply-To: <CAL_JsqJHfVDfpC9Yr7o3HO4wU7QR+sp0mxFLkxwVcGXXLeAyJw@mail.gmail.com>

Hi Rob,

On 15.08.19 15:43, Rob Herring wrote:
> On Thu, Aug 15, 2019 at 4:55 AM Stefan Riedmüller
> <s.riedmueller@phytec.de> wrote:
>>
>> Hi Rob,
>>
>> On 13.08.19 18:04, Rob Herring wrote:
>>> On Wed, Jul 24, 2019 at 09:49:32AM +0200, Stefan Riedmueller wrote:
>>>> Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and
>>>> phyBOARD-Segin.
>>>>
>>>> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
>>>> ---
>>>>    Documentation/devicetree/bindings/arm/fsl.yaml | 8 ++++++++
>>>>    1 file changed, 8 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
>>>> index 7294ac36f4c0..40f007859092 100644
>>>> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
>>>> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
>>>> @@ -161,12 +161,20 @@ properties:
>>>>            items:
>>>>              - enum:
>>>>                  - fsl,imx6ul-14x14-evk      # i.MX6 UltraLite 14x14 EVK Board
>>>> +              - phytec,imx6ul-pbacd10     # PHYTEC phyBOARD-Segin with i.MX6 UL
>>>> +              - phytec,imx6ul-pbacd10-emmc  # PHYTEC phyBOARD-Segin eMMC Kit
>>>> +              - phytec,imx6ul-pbacd10-nand  # PHYTEC phyBOARD-Segin NAND Kit
>>>> +              - phytec,imx6ul-pcl063      # PHYTEC phyCORE-i.MX 6UL
>>>
>>> This doesn't match what is in the dts files:
>>>
>>> arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi:    compatible = "phytec,imx6ul-pcl063", "fsl,imx6ul";
>>> arch/arm/boot/dts/imx6ul-phytec-phyboard-segin-full.dts:      compatible = "phytec,imx6ul-pbacd10", "phytec,imx6ul-pcl063",
>>> "fsl,imx6ul";
>>> arch/arm/boot/dts/imx6ul-phytec-phyboard-segin.dtsi:    compatible = "phytec,imx6ul-pbacd-10", "phytec,imx6ul-pcl063",
>>> "fsl,imx6ul";
>>
>> Shawn already applied my patches which rename the compatibles, see
>> https://lkml.org/lkml/2019/7/23/42
> 
> In any case, it still doesn't match. For example, from those patches:
> 
> + model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC";
> + compatible = "phytec,imx6ull-pbacd10-emmc", "phytec,imx6ull-pbacd10",
> +     "phytec,imx6ull-pcl063","fsl,imx6ull";
> 
> The correct schema for this would be:
> 
> items:
>    - const: phytec,imx6ull-pbacd10-emmc
>    - const: phytec,imx6ull-pbacd10
>    - const: phytec,imx6ull-pcl063
>    - const: fsl,imx6ull
> 
> This defines how many entries (4), what they are, and the order of
> them. Maybe the first entry can be an enum with the -nand compatible
> if those are 2 options.
> 
> Run 'make dtbs_check' and make sure there aren't warnings for the root node.

Thanks for your input. I will take another closer look at this and send a 
new version.

Stefan

> 
> Rob
> 

      reply	other threads:[~2019-08-16 11:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-24  7:49 Stefan Riedmueller
2019-07-24  7:49 ` [PATCH 2/2] dt-bindings: arm: fsl: Add PHYTEC i.MX6 " Stefan Riedmueller
2019-08-13 16:04 ` [PATCH 1/2] dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL " Rob Herring
2019-08-15 10:55   ` Stefan Riedmüller
2019-08-15 13:43     ` Rob Herring
2019-08-16 11:42       ` Stefan Riedmüller [this message]

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