Re: Clause 45 and Clause 22 PHYs on one MDIO bus

[Michael Walle <michael@walle.cc>]

Am 2022-03-21 12:21, schrieb Michael Walle:
> Hi,
> 
> I have a board with a c22 phy (microchip lan8814) and a c45 phy
> (intel/maxlinear gyp215) on one bus. If I understand it correctly, both
> accesses should be able to coexist on one bus. But the microchip 
> lan8814
> actually has a bug and gets confused by c45 accesses. For example it 
> will
> respond in the middle of another transaction with its own data if it
> decodes it as a read. That is something we can see on a logic analyzer.
> But we also see random register writes on the lan8814 (which you don't 
> see
> on the logic analyzer obviously). Fortunately, the GPY215 supports 
> indirect
> MMD access by the standard c22 registers. Thus as a workaround for the
> problem, we could have a c22 only mdio bus.
> 
> The SoC I'm using is the LAN9668, which uses the mdio-mscc-mdio driver.
> First problem there, it doesn't support C45 (yet) but also doesn't 
> check
> for MII_ADDR_C45 and happily reads/writes bogus registers.
> 
> I've looked at the mdio subsystem in linux, there is probe_capabilities
> (MDIOBUS_C45 and friends) but the mxl-gpy.c is using c45 accesses
> nevertheless. I'm not sure if this is a bug or not.
> 
> I was thinking of a fallback mechanism for the c45 read access like
> in read_mmd. And even if the mdio controller is c45 capable, a PHY
> might opt out. In my case, the lan8814.

Actually, it looks like mdiobus_c45_read() is really c45 only and only
used for PHYs which just support c45 and not c45-over-c22 (?). I was
mistaken by the heavy use of the function in phy_device.c. All the
methods in phy-c45.c use phy_*_mmd() functions. Thus it might only be
the mxl-gpy doing something fishy in its probe function. (And I'm
unsure about get_phy_c45_ids()).

Nevertheless, I'd still need the opt-out of any c45 access. Otherwise,
if someone will ever implement c45 support for the mdio-mscc-mdio
driver, I'll run in the erratic behavior.

-michael