Re: [PATCH net-next v12 05/12] dpll: sit9531x: register DPLL devices and pins

[Ivan Vecera <ivecera@redhat.com>]

On 10/9/26 20:31, Ali Rouhi wrote:
> From: Oleg Zadorozhnyi <Oleg.Zadorozhnyi@devoxsoftware.com>
> 
> Register each of the four on-chip PLLs as a DPLL device, and the crystal
> that feeds them as a pin on each.  The inputs and the outputs need a
> state callback the core insists on before it will take a pin, so they are
> registered by the patches that add theirs; what this patch builds is the
> device, the pin machinery around it, and the one pin whose state never
> changes.
> 
> The callbacks a device needs from the start come with it -- lock status
> and the operating mode -- along with the direction of each pin.  The rest
> of the pin operations follow in later patches.  The device selects its
> reference by priority, so automatic is the one mode advertised.  A
> profile that sets manual active select is still reported as automatic,
> since nothing in the driver drives a manual selection, and probe warns
> about it.
> 
> Both need somewhere to read from.  The chip reports its state across
> several pages, and a netlink call must not turn into a burst of I2C
> transactions, so a kthread worker polls the interesting registers twice a
> second into a per-input and per-PLL cache, and the callbacks answer from
> it.  Output state is not polled: it changes only through a request, and
> the getter reads the device again when one could not be confirmed.  The
> same tick compares the new state against the old and notifies the core
> only on a change; the first tick takes the baseline.  Where a board wires
> INTRB, the interrupt schedules that tick immediately rather than
> replacing it: the poll stays as the fallback, since this device gives no
> way to be sure an edge was not missed.
> 
> Which PLL drives an output is read from the PLLs' output-enable masks,
> which PLLC and PLLD keep in mirrored bit order.  An output two masks
> claim goes to the first PLL, with a warning.
> 
> The clock_id that keys a device in the DPLL core is built from the SiTime
> OUI and the part's position: sixteen bits of the I2C bus number and the
> address.  Bus numbers are not bounded by the number of adapters -- a DT
> alias or a mux child can number a bus 256 or above on a board with a
> handful of them -- so the bus gets the width; the variant needs no field,
> since one address on one bus holds one part.
> 
> Signed-off-by: Oleg Zadorozhnyi <Oleg.Zadorozhnyi@devoxsoftware.com>
> Assisted-by: LLM
> Signed-off-by: Ali Rouhi <arouhi@sitime.com>
> ---
>   drivers/dpll/sit9531x/Kconfig  |    4 +
>   drivers/dpll/sit9531x/Makefile |    2 +-
>   drivers/dpll/sit9531x/core.c   | 1763 ++++++++++++++++++++++++++++++--
>   drivers/dpll/sit9531x/core.h   |  258 ++++-
>   drivers/dpll/sit9531x/dpll.c   |  411 ++++++++
>   drivers/dpll/sit9531x/dpll.h   |   68 ++
>   drivers/dpll/sit9531x/regs.h   |  259 ++++-
>   7 files changed, 2671 insertions(+), 94 deletions(-)
>   create mode 100644 drivers/dpll/sit9531x/dpll.c
>   create mode 100644 drivers/dpll/sit9531x/dpll.h
> 
Reviewed-by: Ivan Vecera <ivecera@redhat.com>