Re: [PATCH 2/2] mtd: spi-nor: enable lock interface for macronix chips

[Ivan Mikhaylov <i.mikhaylov@yadro.com>]

On Mon, 2020-08-31 at 12:55 +0200, Rasmus Villemoes wrote:
> On 12/08/2020 17.18, Ivan Mikhaylov wrote:
> > Add locks for whole macronix chip series with BP0-2 and BP0-3 bits.
> > 
> > Tested with mx25l51245g(BP0-3).
> 
> Hmm. I've tried adding support for locking on Macronix to U-Boot
> (
> https://patchwork.ozlabs.org/project/uboot/patch/20200326114257.1782-3-rasmus.villemoes@prevas.dk/
> ),
> but that was quite a bit more involved than this. Note in particular the
> first part of my commit message:
> 
>   Macronix chips implements locking in (power-of-two multiple of) 64K
>   blocks, not as a fraction of the chip's size.
> 
> At least, that was true for the chip I was interested in and the few
> others whose data sheets I grabbed to double-check. So I'm a bit
> skeptical that this can work out-of-the-box without introducing a new
> struct spi_nor_locking_ops.
> 
> Rasmus

Rasmus, but there is already locking of power-of-two as I see from the code,
I'll double check on hw. Also compared documentation n25q512ax3(micron, which
HAS_LOCK) to mx25l25635e(macronix) and they have same block protection table
bits for example. I'd be glad to hear from maintainers on this spot.

Thanks.