Re: [PATCH 2/2] arm64: dts: qcom: Add support for Pixel 3 and Pixel 3 XL

[David Heidelberg <david@ixit.cz>]

On 06/10/2025 14:41, Konrad Dybcio wrote:
> On 10/5/25 3:16 PM, David Heidelberg via B4 Relay wrote:
>> From: David Heidelberg <david@ixit.cz>
>>
>> This adds initial device tree support for the following phones:
>>
>>   - Google Pixel 3 (blueline)
>>   - Google Pixel 3 XL (crosshatch)
>>
>> Both phone boards use the same identifiers and differ only slightly
>> in their connected peripherals.
>>
>> Supported functionality includes:
>>   - Debug UART
>>   - UFS
>>   - Charger
>>   - USB-C (peripheral mode)
>>   - Display (Pixel 3 only)
>>
>> GPIOs 0–3 and 81–84 are not accessible from the application CPUs,
>> so they are marked as reserved to allow the Pixel 3 to boot.
>>
>> The rmtfs region is allocated using UIO, making it technically "dynamic."
>>
>> Its address and size can be read from sysfs:
>>
>> $ cat /sys/class/uio/uio0/name
>> /sys/class/uio/uio0/maps/map0/addr
>> 0x00000000f2701000
>>
>> $ cat /sys/class/uio/uio0/maps/map0/size
>> 0x0000000000200000
>>
>> Like the OnePlus 6, the Pixel 3 requires 1 kB of reserved memory on either
>> side of the rmtfs region to work around an XPU bug that would otherwise
>> cause erroneous violations when accessing the rmtfs_mem region.
> 
> [...]
> 
>> +&gmu {
>> +	status = "okay";
>> +};
> 
> It's already enabled> +
>> +&mdss {
>> +	status = "okay";
>> +};
>> +
>> +&mdss_dsi0 {
>> +	status = "okay";
>> +	vdda-supply = <&vdda_mipi_dsi0_1p2>;
> 
> 'status' should be last, with a \n before it
> 
>> +
>> +	ports {
>> +		port@1 {
>> +			endpoint {
> 
> &mdss_dsi0_out {} instead
> 
>> +				remote-endpoint = <&panel_in>;
>> +				data-lanes = <0 1 2 3>;
>> +				qcom,te-source = "mdp_vsync_e";
>> +			};
>> +		};
>> +	};
>> +
>> +	panel@0 {
>> +		compatible = "lg,sw43408";
>> +		reg = <0>;
>> +
>> +		vddi-supply = <&vreg_l14a_1p88>;
>> +		vpnl-supply = <&vreg_l28a_3p0>;
>> +
>> +		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
>> +
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_pmgpio_pins>;
> 
> property-n
> property-names
> 
> in this order, please
> 
>> +
>> +		port {
>> +			panel_in: endpoint {
>> +				remote-endpoint = <&mdss_dsi0_out>;
>> +			};
>> +		};
>> +	};
>> +};
>> +
>> +&mdss_dsi0_out {
>> +	remote-endpoint = <&panel_in>;
>> +	data-lanes = <0 1 2 3>;
>> +};
> 
> (as mentioned above..)
> 
> [...]
> 
>> +		/* rmtfs lower guard */
>> +		memory@f2700000 {
>> +			reg = <0 0xf2700000 0 0x1000>;
>> +			no-map;
>> +		};
>> +
>> +		rmtfs_mem: memory@f2701000 {
>> +			compatible = "qcom,rmtfs-mem";
>> +			reg = <0 0xf2701000 0 0x200000>;
>> +			no-map;
>> +
>> +			qcom,client-id = <1>;
>> +			qcom,vmid = <15>;
>> +		};
>> +
>> +		/* rmtfs upper guard */
>> +		memory@f2901000 {
>> +			reg = <0 0xf2901000 0 0x1000>;
>> +			no-map;
>> +		};
> 
> qcom,use-guard-pages instead
> 
> [...]
> 
>> +		vreg_l14a_1p88: ldo14 {
>> +			regulator-min-microvolt = <1800000>;
>> +			regulator-max-microvolt = <1800000>;
>> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> +			regulator-boot-on;
>> +			/*
>> +			 * We can't properly bring the panel back if it gets turned off
>> +			 * so keep it's regulators always on for now.
>> +			 */
>> +			regulator-always-on;
> 
> Sounds like your panel driver is not sequencing things properly
> 
> [...]
> 
>> +&uart9 {
>> +	label = "LS-UART1";
> 
> This is a 96boards-ism> +
>> +	status = "okay";
>> +};
>> +
>> +&usb_1 {
>> +	status = "okay";
>> +};
>> +
>> +&usb_1_dwc3 {
>> +	dr_mode = "peripheral";
> 
> Are you sure?

For now, the peripheral usb works, haven't tried to switch to host mode yet.

> 
> [...]
> 
>> +&usb_2 {
>> +	status = "okay";
>> +};
>> +
>> +&usb_2_dwc3 {
>> +	dr_mode = "host";
> 
> Does the phone actually have something connected to both USB hosts?

I assume not,

Bus 001 Device 001: ID 1d6b:0002 Linux 6.16.7-sdm845 xhci-hcd xHCI Host 
Controller
Bus 002 Device 001: ID 1d6b:0003 Linux 6.16.7-sdm845 xhci-hcd xHCI Host 
Controller

I looked at the downstream description and it seems usb_2 was used only 
on sda845 devkit.

David

> 
> Would that be the weasel(?) security chip?
> 
> [...]
> 
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-crosshatch.dts b/arch/arm64/boot/dts/qcom/sdm845-google-crosshatch.dts
>> new file mode 100644
>> index 0000000000000..dc9938ffc0ab8
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/sdm845-google-crosshatch.dts
>> @@ -0,0 +1,137 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +
>> +/dts-v1/;
>> +
>> +#include "sdm845-google-common.dtsi"
>> +
>> +/ {
>> +	model = "Google Pixel 3 XL";
>> +	compatible = "google,crosshatch", "qcom,sdm845";
>> +
>> +	battery: battery {
>> +		compatible = "simple-battery";
>> +
>> +		charge-full-design-microamp-hours = <3480000>;
>> +		voltage-min-design-microvolt = <3600000>;
>> +		voltage-max-design-microvolt = <4400000>;
>> +	};
>> +
>> +	chosen {
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>> +		ranges;
>> +
>> +		/* for u-boot */
>> +		framebuffer: framebuffer@9d400000 {
>> +			compatible = "simple-framebuffer";
>> +			reg = <0 0x9d400000 0 (2960 * 1440 * 4)>;
>> +			width = <1440>;
>> +			height = <2960>;
>> +			stride = <(1440 * 4)>;
>> +			format = "a8r8g8b8";
>> +		};
>> +	};
>> +
>> +	reserved-memory {
>> +		framebuffer_region@9d400000 {
>> +			no-map;
>> +			reg = <0 0x9d400000 0 0x02400000>;
>> +		};
>> +	};
>> +};
>> +
>> +&gmu {
>> +	status = "okay";
>> +};
>> +
>> +&mdss {
>> +	status = "okay";
>> +};
> 
> I'm sure you can push some of this into -common
> 
>> +
>> +&mdss_dsi0 {
>> +	vdda-supply = <&vdda_mipi_dsi0_1p2>;
>> +
>> +	status = "okay";
>> +
>> +	ports {
>> +		port@1 {
>> +			endpoint {
>> +				remote-endpoint = <&panel_in>;
>> +				data-lanes = <0 1 2 3>;
>> +				qcom,te-source = "mdp_vsync_e";
>> +			};
>> +		};
>> +	};
>> +
>> +	panel@0 {
>> +		compatible = "samsung,s6e3ha8";
>> +		reg = <0>;
>> +
>> +		vci-supply = <&vreg_l28a_3p0>; // downstream
> 
> which supply should /* upstream */ use then? :(
> 
> Konrad

-- 
David Heidelberg