* Re: [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros
2025-04-17 10:52 [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros Anshuman Khandual
@ 2025-04-21 6:16 ` Anshuman Khandual
2025-05-05 8:31 ` Anshuman Khandual
2025-05-06 13:10 ` Ada Couprie Diaz
2 siblings, 0 replies; 6+ messages in thread
From: Anshuman Khandual @ 2025-04-21 6:16 UTC (permalink / raw)
To: inux-arm-kernel, linux-arm-kernel
Cc: ada.coupriediaz, Catalin Marinas, Will Deacon, Mark Rutland,
linux-arm-kernel, linux-kernel
+ linux-arm-kernel@lists.infradead.org
LAKML email address had a typo, just adding it back.
On 4/17/25 16:22, Anshuman Khandual wrote:
> MDSCR_EL1 has already been defined in tools sysreg format and hence can be
> used in all debug monitor related call paths. Subsequently all DBG_MDSCR_*
> macros become redundant and hence can be dropped off completely. While here
> convert all variables handling MDSCR_EL1 register as u64 which reflects its
> true width as well.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> This patch applies on v6.15-rc2
>
> arch/arm64/include/asm/assembler.h | 4 ++--
> arch/arm64/include/asm/debug-monitors.h | 6 ------
> arch/arm64/kernel/debug-monitors.c | 22 +++++++++++-----------
> arch/arm64/kernel/entry-common.c | 2 +-
> 4 files changed, 14 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
> index ad63457a05c5..f229d96616e5 100644
> --- a/arch/arm64/include/asm/assembler.h
> +++ b/arch/arm64/include/asm/assembler.h
> @@ -53,7 +53,7 @@
> .macro disable_step_tsk, flgs, tmp
> tbz \flgs, #TIF_SINGLESTEP, 9990f
> mrs \tmp, mdscr_el1
> - bic \tmp, \tmp, #DBG_MDSCR_SS
> + bic \tmp, \tmp, #MDSCR_EL1_SS
> msr mdscr_el1, \tmp
> isb // Take effect before a subsequent clear of DAIF.D
> 9990:
> @@ -63,7 +63,7 @@
> .macro enable_step_tsk, flgs, tmp
> tbz \flgs, #TIF_SINGLESTEP, 9990f
> mrs \tmp, mdscr_el1
> - orr \tmp, \tmp, #DBG_MDSCR_SS
> + orr \tmp, \tmp, #MDSCR_EL1_SS
> msr mdscr_el1, \tmp
> 9990:
> .endm
> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
> index 8f6ba31b8658..1f37dd01482b 100644
> --- a/arch/arm64/include/asm/debug-monitors.h
> +++ b/arch/arm64/include/asm/debug-monitors.h
> @@ -13,14 +13,8 @@
> #include <asm/ptrace.h>
>
> /* Low-level stepping controls. */
> -#define DBG_MDSCR_SS (1 << 0)
> #define DBG_SPSR_SS (1 << 21)
>
> -/* MDSCR_EL1 enabling bits */
> -#define DBG_MDSCR_KDE (1 << 13)
> -#define DBG_MDSCR_MDE (1 << 15)
> -#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
> -
> #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
>
> /* AArch64 */
> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
> index 58f047de3e1c..08f1d02507cd 100644
> --- a/arch/arm64/kernel/debug-monitors.c
> +++ b/arch/arm64/kernel/debug-monitors.c
> @@ -34,7 +34,7 @@ u8 debug_monitors_arch(void)
> /*
> * MDSCR access routines.
> */
> -static void mdscr_write(u32 mdscr)
> +static void mdscr_write(u64 mdscr)
> {
> unsigned long flags;
> flags = local_daif_save();
> @@ -43,7 +43,7 @@ static void mdscr_write(u32 mdscr)
> }
> NOKPROBE_SYMBOL(mdscr_write);
>
> -static u32 mdscr_read(void)
> +static u64 mdscr_read(void)
> {
> return read_sysreg(mdscr_el1);
> }
> @@ -79,16 +79,16 @@ static DEFINE_PER_CPU(int, kde_ref_count);
>
> void enable_debug_monitors(enum dbg_active_el el)
> {
> - u32 mdscr, enable = 0;
> + u64 mdscr, enable = 0;
>
> WARN_ON(preemptible());
>
> if (this_cpu_inc_return(mde_ref_count) == 1)
> - enable = DBG_MDSCR_MDE;
> + enable = MDSCR_EL1_MDE;
>
> if (el == DBG_ACTIVE_EL1 &&
> this_cpu_inc_return(kde_ref_count) == 1)
> - enable |= DBG_MDSCR_KDE;
> + enable |= MDSCR_EL1_KDE;
>
> if (enable && debug_enabled) {
> mdscr = mdscr_read();
> @@ -100,16 +100,16 @@ NOKPROBE_SYMBOL(enable_debug_monitors);
>
> void disable_debug_monitors(enum dbg_active_el el)
> {
> - u32 mdscr, disable = 0;
> + u64 mdscr, disable = 0;
>
> WARN_ON(preemptible());
>
> if (this_cpu_dec_return(mde_ref_count) == 0)
> - disable = ~DBG_MDSCR_MDE;
> + disable = ~MDSCR_EL1_MDE;
>
> if (el == DBG_ACTIVE_EL1 &&
> this_cpu_dec_return(kde_ref_count) == 0)
> - disable &= ~DBG_MDSCR_KDE;
> + disable &= ~MDSCR_EL1_KDE;
>
> if (disable) {
> mdscr = mdscr_read();
> @@ -415,7 +415,7 @@ void kernel_enable_single_step(struct pt_regs *regs)
> {
> WARN_ON(!irqs_disabled());
> set_regs_spsr_ss(regs);
> - mdscr_write(mdscr_read() | DBG_MDSCR_SS);
> + mdscr_write(mdscr_read() | MDSCR_EL1_SS);
> enable_debug_monitors(DBG_ACTIVE_EL1);
> }
> NOKPROBE_SYMBOL(kernel_enable_single_step);
> @@ -423,7 +423,7 @@ NOKPROBE_SYMBOL(kernel_enable_single_step);
> void kernel_disable_single_step(void)
> {
> WARN_ON(!irqs_disabled());
> - mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
> + mdscr_write(mdscr_read() & ~MDSCR_EL1_SS);
> disable_debug_monitors(DBG_ACTIVE_EL1);
> }
> NOKPROBE_SYMBOL(kernel_disable_single_step);
> @@ -431,7 +431,7 @@ NOKPROBE_SYMBOL(kernel_disable_single_step);
> int kernel_active_single_step(void)
> {
> WARN_ON(!irqs_disabled());
> - return mdscr_read() & DBG_MDSCR_SS;
> + return mdscr_read() & MDSCR_EL1_SS;
> }
> NOKPROBE_SYMBOL(kernel_active_single_step);
>
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index b260ddc4d3e9..6dbfc1008007 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -354,7 +354,7 @@ static void cortex_a76_erratum_1463225_svc_handler(void)
>
> __this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);
> reg = read_sysreg(mdscr_el1);
> - val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;
> + val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;
> write_sysreg(val, mdscr_el1);
> asm volatile("msr daifclr, #8");
> isb();
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros
2025-04-17 10:52 [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros Anshuman Khandual
2025-04-21 6:16 ` Anshuman Khandual
@ 2025-05-05 8:31 ` Anshuman Khandual
2025-05-06 13:10 ` Ada Couprie Diaz
2 siblings, 0 replies; 6+ messages in thread
From: Anshuman Khandual @ 2025-05-05 8:31 UTC (permalink / raw)
To: linux-arm-kernel
Cc: ada.coupriediaz, Catalin Marinas, Will Deacon, Mark Rutland,
linux-arm-kernel, linux-kernel
On 4/17/25 16:22, Anshuman Khandual wrote:
> MDSCR_EL1 has already been defined in tools sysreg format and hence can be
> used in all debug monitor related call paths. Subsequently all DBG_MDSCR_*
> macros become redundant and hence can be dropped off completely. While here
> convert all variables handling MDSCR_EL1 register as u64 which reflects its
> true width as well.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> This patch applies on v6.15-rc2
Gentle ping, any updates on this.
>
> arch/arm64/include/asm/assembler.h | 4 ++--
> arch/arm64/include/asm/debug-monitors.h | 6 ------
> arch/arm64/kernel/debug-monitors.c | 22 +++++++++++-----------
> arch/arm64/kernel/entry-common.c | 2 +-
> 4 files changed, 14 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
> index ad63457a05c5..f229d96616e5 100644
> --- a/arch/arm64/include/asm/assembler.h
> +++ b/arch/arm64/include/asm/assembler.h
> @@ -53,7 +53,7 @@
> .macro disable_step_tsk, flgs, tmp
> tbz \flgs, #TIF_SINGLESTEP, 9990f
> mrs \tmp, mdscr_el1
> - bic \tmp, \tmp, #DBG_MDSCR_SS
> + bic \tmp, \tmp, #MDSCR_EL1_SS
> msr mdscr_el1, \tmp
> isb // Take effect before a subsequent clear of DAIF.D
> 9990:
> @@ -63,7 +63,7 @@
> .macro enable_step_tsk, flgs, tmp
> tbz \flgs, #TIF_SINGLESTEP, 9990f
> mrs \tmp, mdscr_el1
> - orr \tmp, \tmp, #DBG_MDSCR_SS
> + orr \tmp, \tmp, #MDSCR_EL1_SS
> msr mdscr_el1, \tmp
> 9990:
> .endm
> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
> index 8f6ba31b8658..1f37dd01482b 100644
> --- a/arch/arm64/include/asm/debug-monitors.h
> +++ b/arch/arm64/include/asm/debug-monitors.h
> @@ -13,14 +13,8 @@
> #include <asm/ptrace.h>
>
> /* Low-level stepping controls. */
> -#define DBG_MDSCR_SS (1 << 0)
> #define DBG_SPSR_SS (1 << 21)
>
> -/* MDSCR_EL1 enabling bits */
> -#define DBG_MDSCR_KDE (1 << 13)
> -#define DBG_MDSCR_MDE (1 << 15)
> -#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
> -
> #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
>
> /* AArch64 */
> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
> index 58f047de3e1c..08f1d02507cd 100644
> --- a/arch/arm64/kernel/debug-monitors.c
> +++ b/arch/arm64/kernel/debug-monitors.c
> @@ -34,7 +34,7 @@ u8 debug_monitors_arch(void)
> /*
> * MDSCR access routines.
> */
> -static void mdscr_write(u32 mdscr)
> +static void mdscr_write(u64 mdscr)
> {
> unsigned long flags;
> flags = local_daif_save();
> @@ -43,7 +43,7 @@ static void mdscr_write(u32 mdscr)
> }
> NOKPROBE_SYMBOL(mdscr_write);
>
> -static u32 mdscr_read(void)
> +static u64 mdscr_read(void)
> {
> return read_sysreg(mdscr_el1);
> }
> @@ -79,16 +79,16 @@ static DEFINE_PER_CPU(int, kde_ref_count);
>
> void enable_debug_monitors(enum dbg_active_el el)
> {
> - u32 mdscr, enable = 0;
> + u64 mdscr, enable = 0;
>
> WARN_ON(preemptible());
>
> if (this_cpu_inc_return(mde_ref_count) == 1)
> - enable = DBG_MDSCR_MDE;
> + enable = MDSCR_EL1_MDE;
>
> if (el == DBG_ACTIVE_EL1 &&
> this_cpu_inc_return(kde_ref_count) == 1)
> - enable |= DBG_MDSCR_KDE;
> + enable |= MDSCR_EL1_KDE;
>
> if (enable && debug_enabled) {
> mdscr = mdscr_read();
> @@ -100,16 +100,16 @@ NOKPROBE_SYMBOL(enable_debug_monitors);
>
> void disable_debug_monitors(enum dbg_active_el el)
> {
> - u32 mdscr, disable = 0;
> + u64 mdscr, disable = 0;
>
> WARN_ON(preemptible());
>
> if (this_cpu_dec_return(mde_ref_count) == 0)
> - disable = ~DBG_MDSCR_MDE;
> + disable = ~MDSCR_EL1_MDE;
>
> if (el == DBG_ACTIVE_EL1 &&
> this_cpu_dec_return(kde_ref_count) == 0)
> - disable &= ~DBG_MDSCR_KDE;
> + disable &= ~MDSCR_EL1_KDE;
>
> if (disable) {
> mdscr = mdscr_read();
> @@ -415,7 +415,7 @@ void kernel_enable_single_step(struct pt_regs *regs)
> {
> WARN_ON(!irqs_disabled());
> set_regs_spsr_ss(regs);
> - mdscr_write(mdscr_read() | DBG_MDSCR_SS);
> + mdscr_write(mdscr_read() | MDSCR_EL1_SS);
> enable_debug_monitors(DBG_ACTIVE_EL1);
> }
> NOKPROBE_SYMBOL(kernel_enable_single_step);
> @@ -423,7 +423,7 @@ NOKPROBE_SYMBOL(kernel_enable_single_step);
> void kernel_disable_single_step(void)
> {
> WARN_ON(!irqs_disabled());
> - mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
> + mdscr_write(mdscr_read() & ~MDSCR_EL1_SS);
> disable_debug_monitors(DBG_ACTIVE_EL1);
> }
> NOKPROBE_SYMBOL(kernel_disable_single_step);
> @@ -431,7 +431,7 @@ NOKPROBE_SYMBOL(kernel_disable_single_step);
> int kernel_active_single_step(void)
> {
> WARN_ON(!irqs_disabled());
> - return mdscr_read() & DBG_MDSCR_SS;
> + return mdscr_read() & MDSCR_EL1_SS;
> }
> NOKPROBE_SYMBOL(kernel_active_single_step);
>
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index b260ddc4d3e9..6dbfc1008007 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -354,7 +354,7 @@ static void cortex_a76_erratum_1463225_svc_handler(void)
>
> __this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);
> reg = read_sysreg(mdscr_el1);
> - val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;
> + val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;
> write_sysreg(val, mdscr_el1);
> asm volatile("msr daifclr, #8");
> isb();
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros
2025-04-17 10:52 [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros Anshuman Khandual
2025-04-21 6:16 ` Anshuman Khandual
2025-05-05 8:31 ` Anshuman Khandual
@ 2025-05-06 13:10 ` Ada Couprie Diaz
2025-05-06 13:15 ` Ada Couprie Diaz
2025-05-07 4:17 ` Anshuman Khandual
2 siblings, 2 replies; 6+ messages in thread
From: Ada Couprie Diaz @ 2025-05-06 13:10 UTC (permalink / raw)
To: Anshuman Khandual, inux-arm-kernel
Cc: Catalin Marinas, Will Deacon, Mark Rutland, linux-arm-kernel,
linux-kernel, Ada Couprie Diaz
Hi Anshuman,
On 17/04/2025 11:52, Anshuman Khandual wrote:
> MDSCR_EL1 has already been defined in tools sysreg format and hence can be
> used in all debug monitor related call paths. Subsequently all DBG_MDSCR_*
> macros become redundant and hence can be dropped off completely. While here
> convert all variables handling MDSCR_EL1 register as u64 which reflects its
> true width as well.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
I think the changes make sense, even more so given that `kvm/debug.c`
already uses the sysreg format definition for MDSCR_EL1.
It looks good to me, but I think there is a missing conversion to 64
bits below.
Would it make sense to convert the two instances of MDSCR_EL1 used in
`tools/testing/selftests/kvm/arm64/debug-exceptions.c`, in
`enable_monitor_debug_exceptions()` and `install_ss()` , to 64 bits as
well ? (They don't rely on `DBG_MDSCR_*`, the test defines its own macros)
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index b260ddc4d3e9..6dbfc1008007 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -354,7 +354,7 @@ static void cortex_a76_erratum_1463225_svc_handler(void)
>
> __this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);
> reg = read_sysreg(mdscr_el1);
> - val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;
> + val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;
> write_sysreg(val, mdscr_el1);
> asm volatile("msr daifclr, #8");
> isb();
Given the change of width to 64 bits elsewhere, shouldn't we change val
and reg to u64 here as well ?
diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
index 73cf6a5f41d8..d61a5ddf53d6 100644
--- a/arch/arm64/kernel/entry-common.c
+++ b/arch/arm64/kernel/entry-common.c
@@ -344,7 +344,7 @@ static DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);
static void cortex_a76_erratum_1463225_svc_handler(void)
{
- u32 reg, val;
+ u64 reg, val;
if (!unlikely(test_thread_flag(TIF_SINGLESTEP)))
return;
Thanks,
Ada
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros
2025-05-06 13:10 ` Ada Couprie Diaz
@ 2025-05-06 13:15 ` Ada Couprie Diaz
2025-05-07 4:17 ` Anshuman Khandual
1 sibling, 0 replies; 6+ messages in thread
From: Ada Couprie Diaz @ 2025-05-06 13:15 UTC (permalink / raw)
To: Anshuman Khandual, linux-arm-kernel
Cc: Catalin Marinas, Will Deacon, Mark Rutland, linux-arm-kernel,
linux-kernel, Ada Couprie Diaz
+ linux-arm-kernel@lists.infradead.org
I forgot to fix the typo for the linux-arm-kernel mailing list while
replying-all to the original patch, adding it back.
Apologies.
On 06/05/2025 14:10, Ada Couprie Diaz wrote:
> Hi Anshuman,
>
> On 17/04/2025 11:52, Anshuman Khandual wrote:
>> MDSCR_EL1 has already been defined in tools sysreg format and hence
>> can be
>> used in all debug monitor related call paths. Subsequently all
>> DBG_MDSCR_*
>> macros become redundant and hence can be dropped off completely.
>> While here
>> convert all variables handling MDSCR_EL1 register as u64 which
>> reflects its
>> true width as well.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>
> I think the changes make sense, even more so given that `kvm/debug.c`
> already uses the sysreg format definition for MDSCR_EL1.
>
> It looks good to me, but I think there is a missing conversion to 64
> bits below.
> Would it make sense to convert the two instances of MDSCR_EL1 used in
> `tools/testing/selftests/kvm/arm64/debug-exceptions.c`, in
> `enable_monitor_debug_exceptions()` and `install_ss()` , to 64 bits as
> well ? (They don't rely on `DBG_MDSCR_*`, the test defines its own
> macros)
>
>> diff --git a/arch/arm64/kernel/entry-common.c
>> b/arch/arm64/kernel/entry-common.c
>> index b260ddc4d3e9..6dbfc1008007 100644
>> --- a/arch/arm64/kernel/entry-common.c
>> +++ b/arch/arm64/kernel/entry-common.c
>> @@ -354,7 +354,7 @@ static void
>> cortex_a76_erratum_1463225_svc_handler(void)
>> __this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);
>> reg = read_sysreg(mdscr_el1);
>> - val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;
>> + val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;
>> write_sysreg(val, mdscr_el1);
>> asm volatile("msr daifclr, #8");
>> isb();
>
> Given the change of width to 64 bits elsewhere, shouldn't we change
> val and reg to u64 here as well ?
>
> diff --git a/arch/arm64/kernel/entry-common.c
> b/arch/arm64/kernel/entry-common.c
> index 73cf6a5f41d8..d61a5ddf53d6 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -344,7 +344,7 @@ static DEFINE_PER_CPU(int,
> __in_cortex_a76_erratum_1463225_wa);
>
> static void cortex_a76_erratum_1463225_svc_handler(void)
> {
> - u32 reg, val;
> + u64 reg, val;
>
> if (!unlikely(test_thread_flag(TIF_SINGLESTEP)))
> return;
>
> Thanks,
> Ada
>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros
2025-05-06 13:10 ` Ada Couprie Diaz
2025-05-06 13:15 ` Ada Couprie Diaz
@ 2025-05-07 4:17 ` Anshuman Khandual
1 sibling, 0 replies; 6+ messages in thread
From: Anshuman Khandual @ 2025-05-07 4:17 UTC (permalink / raw)
To: Ada Couprie Diaz, linux-arm-kernel
Cc: Catalin Marinas, Will Deacon, Mark Rutland, linux-arm-kernel,
linux-kernel
On 5/6/25 18:40, Ada Couprie Diaz wrote:
> Hi Anshuman,
>
> On 17/04/2025 11:52, Anshuman Khandual wrote:
>> MDSCR_EL1 has already been defined in tools sysreg format and hence can be
>> used in all debug monitor related call paths. Subsequently all DBG_MDSCR_*
>> macros become redundant and hence can be dropped off completely. While here
>> convert all variables handling MDSCR_EL1 register as u64 which reflects its
>> true width as well.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>
> I think the changes make sense, even more so given that `kvm/debug.c` already uses the sysreg format definition for MDSCR_EL1.
>
> It looks good to me, but I think there is a missing conversion to 64 bits below.
> Would it make sense to convert the two instances of MDSCR_EL1 used in `tools/testing/selftests/kvm/arm64/debug-exceptions.c`, in `enable_monitor_debug_exceptions()` and `install_ss()` , to 64 bits as well ? (They don't rely on `DBG_MDSCR_*`, the test defines its own macros)
Sure, will do the necessary changes.
>
>> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
>> index b260ddc4d3e9..6dbfc1008007 100644
>> --- a/arch/arm64/kernel/entry-common.c
>> +++ b/arch/arm64/kernel/entry-common.c
>> @@ -354,7 +354,7 @@ static void cortex_a76_erratum_1463225_svc_handler(void)
>> __this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);
>> reg = read_sysreg(mdscr_el1);
>> - val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;
>> + val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;
>> write_sysreg(val, mdscr_el1);
>> asm volatile("msr daifclr, #8");
>> isb();
>
> Given the change of width to 64 bits elsewhere, shouldn't we change val and reg to u64 here as well ?
Sure, will fold this in as well.
>
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index 73cf6a5f41d8..d61a5ddf53d6 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -344,7 +344,7 @@ static DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);
>
> static void cortex_a76_erratum_1463225_svc_handler(void)
> {
> - u32 reg, val;
> + u64 reg, val;
>
> if (!unlikely(test_thread_flag(TIF_SINGLESTEP)))
> return;
Thanks for your review.
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