[PATCH 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[PATCH 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[Maud Spierings via B4 Relay]

Up untill now the extra function mux (pull resistor, etc) has been
defined as a raw hex value, this is difficult to interpret. Add
definitions for these parts of the pinctrl registers to allow for more
readable pinctrl definitions in devictree files.

At this point the patch is not complete, some pinctrl definitions set
bit 30 (0x40000000) but according to the reference manual this is a
reserved field, I currently have no way to identify what the meaning of
this bit is, I hope someone in this CC may be able to provide an answer
to this. It will then be fixed in the v2 of this patch.

It should also be done for the mn/mq but I currently do not have the
reference manuals for these to verify these fields, though I can only
assume that they would be the same.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
Maud Spierings (2):
      arm64: dts: imx8mm: Add pinctrl config definitions
      arm64: dts: imx8mp: Add pinctrl config definitions

 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 27 ++++++++++++++++++++++++++
 2 files changed, 54 insertions(+)
---
base-commit: 0ae0fa3bf0b44c8611d114a9f69985bf451010c3
change-id: 20250214-pinctrl_defines-237e7db61c6a

Best regards,
-- 
Maud Spierings <maudspierings@gocontroll.com>

[PATCH 1/2] arm64: dts: imx8mm: Add pinctrl config definitions

[Maud Spierings via B4 Relay]

From: Maud Spierings <maudspierings@gocontroll.com>

Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index b1f11098d248ed5fc8ac42daed808beebe3bf7bc..b231d5968d07d1e135963b714c3fe80ddd8641ab 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -6,6 +6,33 @@
 #ifndef __DTS_IMX8MM_PINFUNC_H
 #define __DTS_IMX8MM_PINFUNC_H
 
+//Drive Strength
+#define MX8MM_DSE_X1 0x0
+#define MX8MM_DSE_X2 0x4
+#define MX8MM_DSE_X4 0x2
+#define MX8MM_DSE_X6 0x6
+
+//Slew Rate
+#define MX8MM_FSEL_FAST 0x10
+#define MX8MM_FSEL_SLOW 0x0
+
+//Open Drain
+#define MX8MM_ODE_ENABLE 0x20
+#define MX8MM_ODE_DISABLE 0x0
+
+#define MX8MM_PULL_DOWN 0x0
+#define MX8MM_PULL_UP 0x40
+
+//Hysteresis
+#define MX8MM_HYS_CMOS 0x0
+#define MX8MM_HYS_SCHMITT 0x80
+
+#define MX8MM_PULL_ENABLE 0x100
+#define MX8MM_PULL_DISABLE 0x0
+
+//?
+#define MX8MM_MYSTERY_BIT 0x40000000
+
 /*
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>

-- 
2.48.1

Re: [PATCH 1/2] arm64: dts: imx8mm: Add pinctrl config definitions

[Frank Li]

On Fri, Feb 14, 2025 at 04:57:42PM +0100, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
> register is written in the dts, these values are not obvious. Add defines
> which describe the fields of this register which can be or-ed together to
> produce readable settings.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> index b1f11098d248ed5fc8ac42daed808beebe3bf7bc..b231d5968d07d1e135963b714c3fe80ddd8641ab 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> @@ -6,6 +6,33 @@
>  #ifndef __DTS_IMX8MM_PINFUNC_H
>  #define __DTS_IMX8MM_PINFUNC_H
>
> +//Drive Strength
> +#define MX8MM_DSE_X1 0x0
> +#define MX8MM_DSE_X2 0x4
> +#define MX8MM_DSE_X4 0x2
> +#define MX8MM_DSE_X6 0x6
> +
> +//Slew Rate
> +#define MX8MM_FSEL_FAST 0x10
> +#define MX8MM_FSEL_SLOW 0x0
> +
> +//Open Drain
> +#define MX8MM_ODE_ENABLE 0x20
> +#define MX8MM_ODE_DISABLE 0x0
> +
> +#define MX8MM_PULL_DOWN 0x0
> +#define MX8MM_PULL_UP 0x40
> +
> +//Hysteresis
> +#define MX8MM_HYS_CMOS 0x0
> +#define MX8MM_HYS_SCHMITT 0x80
> +
> +#define MX8MM_PULL_ENABLE 0x100
> +#define MX8MM_PULL_DISABLE 0x0
> +
> +//?
> +#define MX8MM_MYSTERY_BIT 0x40000000

Suppose it is SION
See pinctrl driver's IMX_PAD_SION

Frank

> +
>  /*
>   * The pin function ID is a tuple of
>   * <mux_reg conf_reg input_reg mux_mode input_val>
>
> --
> 2.48.1
>
>

[PATCH 2/2] arm64: dts: imx8mp: Add pinctrl config definitions

[Maud Spierings via B4 Relay]

From: Maud Spierings <maudspierings@gocontroll.com>

Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 27 ++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
index 0fef066471ba607be02d0ab15da5a048a8a213a7..8d4d621ad22165ca6c92499b273ec4178780c475 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
@@ -6,6 +6,33 @@
 #ifndef __DTS_IMX8MP_PINFUNC_H
 #define __DTS_IMX8MP_PINFUNC_H
 
+//Drive Strength
+#define MX8MP_DSE_X1 0x0
+#define MX8MP_DSE_X2 0x4
+#define MX8MP_DSE_X4 0x2
+#define MX8MP_DSE_X6 0x6
+
+//Slew Rate
+#define MX8MP_FSEL_FAST 0x10
+#define MX8MP_FSEL_SLOW 0x0
+
+//Open Drain
+#define MX8MP_ODE_ENABLE 0x20
+#define MX8MP_ODE_DISABLE 0x0
+
+#define MX8MP_PULL_DOWN 0x0
+#define MX8MP_PULL_UP 0x40
+
+//Hysteresis
+#define MX8MP_HYS_CMOS 0x0
+#define MX8MP_HYS_SCHMITT 0x80
+
+#define MX8MP_PULL_ENABLE 0x100
+#define MX8MP_PULL_DISABLE 0x0
+
+//?
+#define MX8MP_MYSTERY_BIT 0x40000000
+
 /*
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>

-- 
2.48.1

Re: [PATCH 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[Lucas Stach]

Hi Maud,

Am Freitag, dem 14.02.2025 um 16:57 +0100 schrieb Maud Spierings via B4
Relay:
> Up untill now the extra function mux (pull resistor, etc) has been
> defined as a raw hex value, this is difficult to interpret. Add
> definitions for these parts of the pinctrl registers to allow for more
> readable pinctrl definitions in devictree files.
> 
I certainly prefer the short form with the hex value, I find that quite
a bit more readable than very verbose swathes of defines ORed together.
But each to their own.

> At this point the patch is not complete, some pinctrl definitions set
> bit 30 (0x40000000) but according to the reference manual this is a
> reserved field, I currently have no way to identify what the meaning of
> this bit is, I hope someone in this CC may be able to provide an answer
> to this. It will then be fixed in the v2 of this patch.

This is not a mystery bit, it's used by the pinctrl driver to force
enable the input path of the pad (SION). This is defined in the generic
i.MX pinctrl binding, see
Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt

Regards,
Lucas

> 
> It should also be done for the mn/mq but I currently do not have the
> reference manuals for these to verify these fields, though I can only
> assume that they would be the same.
> 
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
> Maud Spierings (2):
>       arm64: dts: imx8mm: Add pinctrl config definitions
>       arm64: dts: imx8mp: Add pinctrl config definitions
> 
>  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
>  arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 27 ++++++++++++++++++++++++++
>  2 files changed, 54 insertions(+)
> ---
> base-commit: 0ae0fa3bf0b44c8611d114a9f69985bf451010c3
> change-id: 20250214-pinctrl_defines-237e7db61c6a
> 
> Best regards,

Re: [PATCH 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[Maud Spierings | GOcontroll]

From: Lucas Stach <l.stach@pengutronix.de>
Sent: Friday, February 14, 2025 5:28 PM
 
>Hi Maud,

>Am Freitag, dem 14.02.2025 um 16:57 +0100 schrieb Maud Spierings via B4
>Relay:
>> Up untill now the extra function mux (pull resistor, etc) has been
>> defined as a raw hex value, this is difficult to interpret. Add
>> definitions for these parts of the pinctrl registers to allow for more
>> readable pinctrl definitions in devictree files.

>I certainly prefer the short form with the hex value, I find that quite
>a bit more readable than very verbose swathes of defines ORed together.
>But each to their own.

I personally prefer it, but it would be accepted if I write a dts using this if it
gets accepted? I am currently working on devicetrees for all of our devices
preferably they would use this.

>> At this point the patch is not complete, some pinctrl definitions set
>> bit 30 (0x40000000) but according to the reference manual this is a
>> reserved field, I currently have no way to identify what the meaning of
>> this bit is, I hope someone in this CC may be able to provide an answer
>> to this. It will then be fixed in the v2 of this patch.

>This is not a mystery bit, it's used by the pinctrl driver to force
>enable the input path of the pad (SION). This is defined in the generic
>i.MX pinctrl binding, see
>Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt

I had a suspicion that it was that but got confused because that is a different
register. Will change it to that in v2 somewhere next week.

Kind regards,
Maud Spierings

Re: [PATCH 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[Lucas Stach]

Am Samstag, dem 15.02.2025 um 10:02 +0000 schrieb Maud Spierings |
GOcontroll:
> From: Lucas Stach <l.stach@pengutronix.de>
> Sent: Friday, February 14, 2025 5:28 PM
>  
> > Hi Maud,
> 
> > Am Freitag, dem 14.02.2025 um 16:57 +0100 schrieb Maud Spierings via B4
> > Relay:
> > > Up untill now the extra function mux (pull resistor, etc) has been
> > > defined as a raw hex value, this is difficult to interpret. Add
> > > definitions for these parts of the pinctrl registers to allow for more
> > > readable pinctrl definitions in devictree files.
> 
> > I certainly prefer the short form with the hex value, I find that quite
> > a bit more readable than very verbose swathes of defines ORed together.
> > But each to their own.
> 
> I personally prefer it, but it would be accepted if I write a dts using this if it
> gets accepted? I am currently working on devicetrees for all of our devices
> preferably they would use this.
> 
I'm not the ultimate authority on this, as I'm not the official
maintainer of the i.MX DTs. That would be Shawn, so he has to agree to
this. However, my gut feeling is that it would be accepted if you as
the author of the board DT prefer this style.

Just don't go around and convert other board DTs maintained by other
people to the verbose define style.

Regards,
Lucas