From: Adrian Hunter <adrian.hunter@intel.com>
To: "Ernest Zhang(WH)" <ernest.zhang@bayhubtech.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: "Chuanjin Pang (WH)" <chuanjin.pang@bayhubtech.com>,
"Mike Li (WH)" <mike.li@bayhubtech.com>,
"Chevron Li (WH)" <chevron.li@bayhubtech.com>,
"Shirley Her (SC)" <shirley.her@bayhubtech.com>,
"Xiaoguang Yu (WH)" <xiaoguang.yu@bayhubtech.com>,
"Bobby Wu (WH)" <bobby.wu@bayhubtech.com>
Subject: Re: [PATCH V8 2/5] mmc: sdhci: Change O2 Host HS200 mode clock frequency to 200MHz
Date: Fri, 3 Aug 2018 16:04:38 +0300 [thread overview]
Message-ID: <d107eacd-10ad-fd0a-0944-7b36745c79c5@intel.com> (raw)
In-Reply-To: <BYAPR04MB476082C4951D3D7EE47B3881E52A0@BYAPR04MB4760.namprd04.prod.outlook.com>
On 27/07/18 19:23, Ernest Zhang(WH) wrote:
> O2 SD Host HS200 mode clock frequency current is 208MHz, should be changed to 200MHz to meet specification.
>
> Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> Change in V8:
> The set base clock code comment has been changed in accordance with
> code change in V7.
>
> Change in V7:
> Change HS200 mode clock frequency from 208MHz to 200MHz to meet
> Specification.
>
> Change in V1~V6:
> N/A
> ---
> drivers/mmc/host/sdhci-pci-o2micro.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
> index ba59db6a126c..9e7bacda4717 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -311,9 +311,9 @@ int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
>
> /* Check Whether subId is 0x11 or 0x12 */
> if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) {
> - scratch_32 = 0x2c280000;
> + scratch_32 = 0x25100000;
>
> - /* Set Base Clock to 208MZ */
> + /* Set Base Clock to 200MZ */
MZ -> MHz
> o2_pci_set_baseclk(chip, scratch_32);
> ret = pci_read_config_dword(chip->pdev,
> O2_SD_FUNC_REG4,
> @@ -406,7 +406,7 @@ int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
> O2_SD_PLL_SETTING, scratch_32);
> } else {
> scratch_32 &= 0x0000FFFF;
> - scratch_32 |= 0x2c280000;
> + scratch_32 |= 0x25100000;
>
> pci_write_config_dword(chip->pdev,
> O2_SD_PLL_SETTING, scratch_32);
> --
> 2.17.1
>
>
> -----邮件原件-----
> 发件人: Adrian Hunter <adrian.hunter@intel.com>
> 发送时间: Friday, July 27, 2018 2:58 PM
> 收件人: Ernest Zhang(WH) <ernest.zhang@bayhubtech.com>; Ulf Hansson <ulf.hansson@linaro.org>; linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org
> 抄送: Chuanjin Pang (WH) <chuanjin.pang@bayhubtech.com>; Mike Li (WH) <mike.li@bayhubtech.com>; Chevron Li (WH) <chevron.li@bayhubtech.com>; Shirley Her (SC) <shirley.her@bayhubtech.com>; Xiaoguang Yu (WH) <xiaoguang.yu@bayhubtech.com>; Bobby Wu (WH) <bobby.wu@bayhubtech.com>
> 主题: Re: [PATCH V7 2/5] mmc: sdhci: Change O2 Host HS200 mode clock frequency to 200MHz
>
> On 27/07/18 09:49, Ernest Zhang(WH) wrote:
>> Hi Adrian,
>> Do I need re-submit all 5 patches after fix that and change the version to v8?
>
> You can reply to this email with PATCH V8 2/5 that has my Ack and the comment fixed.
>
>> BR
>>
>> -----Original Message-----
>> From: Adrian Hunter [mailto:adrian.hunter@intel.com]
>> Sent: 2018年7月25日 15:45
>> To: Ernest Zhang(WH); Ulf Hansson; linux-mmc@vger.kernel.org;
>> linux-kernel@vger.kernel.org
>> Cc: Chuanjin Pang (WH); Mike Li (WH); Chevron Li (WH); Shirley Her
>> (SC); Xiaoguang Yu (WH); Bobby Wu (WH)
>> Subject: Re: [PATCH V7 2/5] mmc: sdhci: Change O2 Host HS200 mode
>> clock frequency to 200MHz
>>
>> On 16/07/18 09:26, ernest.zhang wrote:
>>> O2 SD Host HS200 mode clock frequency current is 208MHz, should be
>>> changed to 200MHz to meet specification.
>>>
>>> Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com>
>>
>> You left in the misleading comment. Fix that and add:
>>
>> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
>>
>>> ---
>>> Change in V7:
>>> Change HS200 mode clock frequency from 208MHz to 200MHz to meet
>>> Specification.
>>>
>>> Change in V1~V6:
>>> N/A
>>> ---
>>> drivers/mmc/host/sdhci-pci-o2micro.c | 4 ++--
>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c
>>> b/drivers/mmc/host/sdhci-pci-o2micro.c
>>> index ba59db6a126c..94cf3cd75dd3 100644
>>> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
>>> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
>>> @@ -311,7 +311,7 @@ int sdhci_pci_o2_probe(struct sdhci_pci_chip
>>> *chip)
>>>
>>> /* Check Whether subId is 0x11 or 0x12 */
>>> if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) {
>>> - scratch_32 = 0x2c280000;
>>> + scratch_32 = 0x25100000;
>>>
>>> /* Set Base Clock to 208MZ */
>>
>> That comment is misleading now.
>>
>>> o2_pci_set_baseclk(chip, scratch_32); @@ -406,7 +406,7 @@ int
>>> sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
>>> O2_SD_PLL_SETTING, scratch_32);
>>> } else {
>>> scratch_32 &= 0x0000FFFF;
>>> - scratch_32 |= 0x2c280000;
>>> + scratch_32 |= 0x25100000;
>>>
>>> pci_write_config_dword(chip->pdev,
>>> O2_SD_PLL_SETTING, scratch_32);
>>>
>>
>
prev parent reply other threads:[~2018-08-03 13:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-27 16:23 Ernest Zhang(WH)
2018-08-03 13:04 ` Adrian Hunter [this message]
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