From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm8450: add Soundwire and LPASS
Date: Tue, 15 Nov 2022 11:15:00 +0100 [thread overview]
Message-ID: <d1177e53-a4f2-70e5-9214-671910ea28ac@linaro.org> (raw)
In-Reply-To: <fbf1fc09-31a9-a08f-6ffd-551fdd317ec0@linaro.org>
On 14/11/2022 16:37, Konrad Dybcio wrote:
>
> On 14/11/2022 16:21, Krzysztof Kozlowski wrote:
>> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>>
>> Add Soundwire controllers, Low Power Audio SubSystem (LPASS) devices and
>> LPASS pin controller.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 295 +++++++++++++++++++++++++++
>> 1 file changed, 295 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index 4b0a1eee8bd9..c99740591467 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -15,6 +15,7 @@
>> #include <dt-bindings/interconnect/qcom,sm8450.h>
>> #include <dt-bindings/soc/qcom,gpr.h>
>> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>> +#include <dt-bindings/sound/qcom,q6afe.h>
>> #include <dt-bindings/thermal/thermal.h>
>>
>> / {
>> @@ -2097,6 +2098,212 @@ compute-cb@3 {
>> };
>> };
>>
>> + wsa2macro: codec@31e0000 {
>> + compatible = "qcom,sm8450-lpass-wsa-macro";
>> + reg = <0 0x031e0000 0 0x1000>;
> The sorting will be off, as adsp and cdsp have been mistakenly put in
> the wrong place (notice adsp @ 32300000 is actually at an address
> that's 8 hex digits long, but the reg addr is padded to 9 hex digits..).
I don't get it. This has address:
31e0000
ADSP has
30000000
so why sorting is odd?
> > Could you submit a fix for that as well?
For 9 digits, sure, but this is independent issue.
>
>> + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> + <&vamacro>;
>> + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
>> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
>
> Remove the duplicated space before LPASS_CLK_ATTRIBUTE_COUPLE_NO.
Ack.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-11-15 10:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-14 15:21 [PATCH 0/3] arm64: dts: qcom: sm8450-hdk: add sound support Krzysztof Kozlowski
2022-11-14 15:21 ` [PATCH 1/3] arm64: dts: qcom: sm8450: add GPR node Krzysztof Kozlowski
2022-11-14 15:21 ` [PATCH 2/3] arm64: dts: qcom: sm8450: add Soundwire and LPASS Krzysztof Kozlowski
2022-11-14 15:37 ` Konrad Dybcio
2022-11-15 10:15 ` Krzysztof Kozlowski [this message]
2022-11-15 10:19 ` Konrad Dybcio
2022-11-14 15:21 ` [PATCH 3/3] arm64: dts: qcom: sm8450-hdk: add sound support Krzysztof Kozlowski
2022-11-14 15:39 ` Konrad Dybcio
2022-11-15 10:16 ` Krzysztof Kozlowski
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