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From: Mario Limonciello <mario.limonciello@amd.com>
To: "Rafael J. Wysocki (Intel)" <rafael@kernel.org>,
	Keng-Yu Lin <keng-yu.lin@hpe.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Matthew Ruffell <matthew.ruffell@canonical.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	andy.liang@hpe.com, david.chang@hpe.com, s.collins@hpe.com,
	jenifer.golmitz@hpe.com, pravallika.kamma@hpe.com,
	zhen-dong.lai@hpe.com, zachary.pabor-ext@hpe.com,
	stable@vger.kernel.org
Subject: Re: [PATCH v2] PCI/PM: Restore BARs after powering up during enumeration
Date: Tue, 13 Oct 2026 10:39:54 -0500	[thread overview]
Message-ID: <d11aa70c-4753-4a28-9955-990c45649677@amd.com> (raw)
In-Reply-To: <CAJZ5v0hndk_ck1hcgWXyGX=OHmbfbhKsrJQsNQF9DQrucRNMDw@mail.gmail.com>



On 10/13/26 10:23, Rafael J. Wysocki (Intel) wrote:
> On Tue, Oct 13, 2026 at 8:10 AM Keng-Yu Lin <keng-yu.lin@hpe.com> wrote:
>>
>> Hi Rafael, Mario,
>>
>> The initial read is not needed to fix the reported D3hot-to-D0
>> failure. I added it to avoid extra BAR writes on devices already
>> in D0.
>>
>> pci_power_up() does update current_state, but need_restore is
>> calculated before that update. The check includes:
>>
>>          dev->current_state >= PCI_D3hot
>>
>> For an initially unknown device with PMCSR reporting D0 and
>> No_Soft_Reset clear, this still requests a BAR restore. Reading
>> the state first avoids that request, although the final
>> current_state is D0 either way.
> 
> Fair enough, but if the device is in D0 already, it need not be
> powered up, so if you make a point to update the power state upfront,
> you may as well skip the power up if the outcome is D0.

It actually does need to have all the ACPI calls that happen as part of 
the D0 transition though like _REG.

  reply	other threads:[~2026-10-13 15:41 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-12 10:46 Keng-Yu Lin
2026-10-12 11:34 ` Rafael J. Wysocki (Intel)
2026-10-12 17:09   ` Mario Limonciello
2026-10-13  6:09     ` Keng-Yu Lin
2026-10-13 15:23       ` Rafael J. Wysocki (Intel)
2026-10-13 15:39         ` Mario Limonciello [this message]
2026-10-13 15:52           ` Rafael J. Wysocki (Intel)
2026-10-13 16:57             ` Rafael J. Wysocki (Intel)
2026-10-13 21:48               ` Mario Limonciello
2026-10-14  4:31                 ` Keng-Yu Lin

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