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From: Mario Limonciello <mario.limonciello@amd.com>
To: "Rafael J. Wysocki (Intel)" <rafael@kernel.org>
Cc: Keng-Yu Lin <keng-yu.lin@hpe.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Matthew Ruffell <matthew.ruffell@canonical.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	andy.liang@hpe.com, david.chang@hpe.com, s.collins@hpe.com,
	jenifer.golmitz@hpe.com, pravallika.kamma@hpe.com,
	zhen-dong.lai@hpe.com, zachary.pabor-ext@hpe.com
Subject: Re: [PATCH v2] PCI/PM: Restore BARs after powering up during enumeration
Date: Tue, 13 Oct 2026 16:48:09 -0500	[thread overview]
Message-ID: <80c964e1-30d3-4b09-aef8-08c04e119e79@amd.com> (raw)
In-Reply-To: <CAJZ5v0ie2AvCbdv8-zkpYzHLcTwUPUj+=WWOQjDAPmSepSAQPg@mail.gmail.com>



On 10/13/26 11:57, Rafael J. Wysocki (Intel) wrote:
> On Tue, Oct 13, 2026 at 5:52 PM Rafael J. Wysocki (Intel)
> <rafael@kernel.org> wrote:
>>
>> On Tue, Oct 13, 2026 at 5:41 PM Mario Limonciello
>> <mario.limonciello@amd.com> wrote:
>>>
>>>
>>>
>>> On 10/13/26 10:23, Rafael J. Wysocki (Intel) wrote:
>>>> On Tue, Oct 13, 2026 at 8:10 AM Keng-Yu Lin <keng-yu.lin@hpe.com> wrote:
>>>>>
>>>>> Hi Rafael, Mario,
>>>>>
>>>>> The initial read is not needed to fix the reported D3hot-to-D0
>>>>> failure. I added it to avoid extra BAR writes on devices already
>>>>> in D0.
>>>>>
>>>>> pci_power_up() does update current_state, but need_restore is
>>>>> calculated before that update. The check includes:
>>>>>
>>>>>           dev->current_state >= PCI_D3hot
>>>>>
>>>>> For an initially unknown device with PMCSR reporting D0 and
>>>>> No_Soft_Reset clear, this still requests a BAR restore. Reading
>>>>> the state first avoids that request, although the final
>>>>> current_state is D0 either way.
>>>>
>>>> Fair enough, but if the device is in D0 already, it need not be
>>>> powered up, so if you make a point to update the power state upfront,
>>>> you may as well skip the power up if the outcome is D0.
>>>
>>> It actually does need to have all the ACPI calls that happen as part of
>>> the D0 transition though like _REG.
>>
>> Good point.
>>
>> This basically means that the upfront power state check belongs to the
>> logic to determine whether or not to restore the BARs which should be
>> part of pci_power_up().
>>
>> So now the question is, if this upfront power state check is done, is
>> it still useful to read PMCSR after calling
>> platform_pci_set_power_state() in pci_power_up()?
> 
> Or what about using the following sequence:
> 
> pci_update_current_state(dev, PCI_UNKNOWN);
> if (dev->current_state == PCI_D0) {
>          /* No need to do a full power-up, just sync-up the platform state. */
>          platform_pci_set_power_state(dev, PCI_D0);
> } else {
>          /* Power up the device and restore BARs if necessary. */
>          pci_set_full_power_state(dev, false);
> }
> pci_update_current_state(dev, PCI_D0);

That looks great to me.

  reply	other threads:[~2026-10-13 21:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-12 10:46 Keng-Yu Lin
2026-10-12 11:34 ` Rafael J. Wysocki (Intel)
2026-10-12 17:09   ` Mario Limonciello
2026-10-13  6:09     ` Keng-Yu Lin
2026-10-13 15:23       ` Rafael J. Wysocki (Intel)
2026-10-13 15:39         ` Mario Limonciello
2026-10-13 15:52           ` Rafael J. Wysocki (Intel)
2026-10-13 16:57             ` Rafael J. Wysocki (Intel)
2026-10-13 21:48               ` Mario Limonciello [this message]
2026-10-14  4:31                 ` Keng-Yu Lin

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