From: Sergey Shtylyov <s.shtylyov@omp.ru>
To: Thomas Gleixner <tglx@linutronix.de>,
<linux-kernel@vger.kernel.org>, Marc Zyngier <maz@kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] irqchip/gic: prevent buffer overflow in gic_ipi_send_mask()
Date: Mon, 9 Sep 2024 22:23:21 +0300 [thread overview]
Message-ID: <d1c2f362-da11-b17a-40ff-daecb5abf909@omp.ru> (raw)
In-Reply-To: <87cyli5zj7.ffs@tglx>
On 9/5/24 10:29 AM, Thomas Gleixner wrote:
[...]
>> ARM GIC arch v2 spec claims support for just 8 CPU interfaces. However,
>> looking at the GIC driver's irq_set_affinity() method, it seems that the
>> passed CPU mask may contain the logical CPU #s beyond 8, and that method
s/8/7/, of course... :-<
>> filters them out before reading gic_cpu_map[], bailing out with
>> -EINVAL.
>
> The reasoning is correct in theory, but in reality it's a non problem.
Frankly, before finalizing this patch I had tried to ascertain whether
cpumask could contain CPUs with the logical #s higher than 8 but that was
taking way too much time and I gave up... :-)
> Simply because processors which use this GIC version cannot have more
> than 8 cores.
And big.LITTLE not involved?
> That means num_possible_cpus() <= 8 so the cpumask handed in cannot have
> bits >= 8 set. Ergo for_each_cpu() can't return a bit which is >= 8.
Perhaps adding WARN_ON() would make some sense though? :-)
> Thanks
>
> tglx
MBR, Sergey
next prev parent reply other threads:[~2024-09-09 19:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 20:23 Sergey Shtylyov
2024-09-05 7:29 ` Thomas Gleixner
2024-09-05 7:47 ` Marc Zyngier
2024-09-06 20:29 ` Sergey Shtylyov
2024-09-06 20:36 ` Sergey Shtylyov
2024-09-08 9:37 ` Marc Zyngier
2024-09-09 19:48 ` Sergey Shtylyov
2024-09-10 7:38 ` Marc Zyngier
2024-09-09 19:23 ` Sergey Shtylyov [this message]
2024-09-10 7:50 ` Marc Zyngier
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