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From: Sergey Shtylyov <s.shtylyov@omp.ru>
To: Marc Zyngier <maz@kernel.org>, Thomas Gleixner <tglx@linutronix.de>
Cc: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] irqchip/gic: prevent buffer overflow in gic_ipi_send_mask()
Date: Fri, 6 Sep 2024 23:29:47 +0300	[thread overview]
Message-ID: <f0efe812-a77b-9a77-c17c-ece503475923@omp.ru> (raw)
In-Reply-To: <86o752v8xs.wl-maz@kernel.org>

On 9/5/24 10:47 AM, Marc Zyngier wrote:
[...]

>>> ARM GIC arch v2 spec claims support for just 8 CPU interfaces.  However,
>>> looking at the GIC driver's irq_set_affinity() method, it seems that the
>>> passed CPU mask may contain the logical CPU #s beyond 8, and that method
>>> filters them out before reading gic_cpu_map[], bailing out with
>>> -EINVAL.
>>
>> The reasoning is correct in theory, but in reality it's a non problem.
>>
>> Simply because processors which use this GIC version cannot have more
>> than 8 cores.
>>
>> That means num_possible_cpus() <= 8 so the cpumask handed in cannot have
>> bits >= 8 set. Ergo for_each_cpu() can't return a bit which is >= 8.
> 
> That.

   That? :-)

> The irq_set_affinity() check exists because the affinity can be
> provided by userspace, and used to be be *anything*. Since

   In this case you mean gic_set_affinity(), right?

> 33de0aa4bae98, the affinity that the driver gets is narrowed to what
> is actually *online*.

   What I haven't quite understood from my (cursory) looking at the GICv2
spec (and the GIC driver) is why only one CPU (with a lowest #) is selected
from *mask_val before writing to GICD_GIC_DIST_TARGET, while the spec holds
that an IRQ can be forwarded to any set of 8 CPU interfaces...
 
> So we could actually relax the check in the driver (not that it really
> matters).

   Well, maybe in my copious free time... :-)

> Thanks,
> 
> 	M.

MBR, Sergey

  reply	other threads:[~2024-09-06 20:30 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-04 20:23 Sergey Shtylyov
2024-09-05  7:29 ` Thomas Gleixner
2024-09-05  7:47   ` Marc Zyngier
2024-09-06 20:29     ` Sergey Shtylyov [this message]
2024-09-06 20:36       ` Sergey Shtylyov
2024-09-08  9:37       ` Marc Zyngier
2024-09-09 19:48         ` Sergey Shtylyov
2024-09-10  7:38           ` Marc Zyngier
2024-09-09 19:23   ` Sergey Shtylyov
2024-09-10  7:50     ` Marc Zyngier

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