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From: James Clark <james.clark@linaro.org>
To: Leo Yan <leo.yan@arm.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>, Jiri Olsa <jolsa@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Mike Leach <mike.leach@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Suyash Mahar <smahar@meta.com>, Amir Ayupov <aaupov@fb.com>
Subject: Re: [PATCH v2 11/14] perf tests: Check CoreSight IRQ entry and exit
Date: Tue, 29 Sep 2026 13:22:55 +0100	[thread overview]
Message-ID: <d371220f-9ad2-41ca-a2a5-930c46801c31@linaro.org> (raw)
In-Reply-To: <20260923-perf_cs_etm_fix_non_taken-v2-11-6ab8c07a5455@arm.com>



On 23/09/2026 16:21, Leo Yan wrote:
> Add an AArch64 branch_not_taken_loop workload and a CoreSight shell test
> checking IRQ entry and exit PCs. Use cpu-clock generates timer
> interrupts.
> 
> Retry at different timer frequencies and skip if no complete pair is
> captured.

Maybe we need to look into storing existing recordings somewhere or 
committing small ones into the repo again. This test took 3 minutes to 
run on my N1SDP, which is 3x longer than the entire Coresight suite, and 
then it skipped anyway:

173: CoreSight IRQ entry and exit:
---- start ----
test child forked, pid 6804
Recording timer IRQs at 1000 Hz
No complete exception entry/exit pair
No complete IRQ pair in this recording
Recording timer IRQs at 4000 Hz
No complete exception entry/exit pair
No complete IRQ pair in this recording
Recording timer IRQs at 10000 Hz
No complete exception entry/exit pair
No complete IRQ pair in this recording
[Skip] No complete IRQ pair after three recordings
---- end(-2) ----
173: CoreSight IRQ entry and exit


Really this test is only looking for how a single exception on a single 
branch is decoded, it shouldn't be affected by how it was recorded. Even 
a few bytes of trace would be enough to test it. Or maybe we could add 
some kind of unit test framework that mocks out OpenCSD and allows us to 
script how different packets affect the decoder?

But we have to be careful to not add slow tests because it means they're 
much less likely to be run, or results ignored as it's so hard to 
iterate quickly. Or also in this case, silently skipped if something 
regresses.

> 
> For example, an expected hw int/iret pair is:
> 
>    hw int           5cc928 => ffff800080010c80 insn: 63 04 00 f1
>    ...
>    iret   ffff800080012284 =>           5cc928 insn: e0 03 9f d6
> 
> The entry PC is the architectural resume address, here SUBS X3, X3, #1
> at 0x5cc928. After the IRQ is handled, ERET returns to the same PC to
> continue execution.
> 
> Assisted-by: Codex:gpt-6
> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
>   tools/perf/tests/builtin-test.c                    |   1 +
>   tools/perf/tests/shell/coresight/irq_entry_exit.sh |  37 +++++
>   tools/perf/tests/shell/lib/coresight_exception.sh  | 165 +++++++++++++++++++++
>   tools/perf/tests/tests.h                           |   1 +
>   tools/perf/tests/workloads/Build                   |   2 +
>   tools/perf/tests/workloads/branch_not_taken_loop.c |  33 +++++
>   6 files changed, 239 insertions(+)
> 
> diff --git a/tools/perf/tests/builtin-test.c b/tools/perf/tests/builtin-test.c
> index 6259ed805c5f75799d52ac742b77cf278f98bd9d..8eab221f115e75a3ef90be975d4ed0558ceb2b16 100644
> --- a/tools/perf/tests/builtin-test.c
> +++ b/tools/perf/tests/builtin-test.c
> @@ -171,6 +171,7 @@ static struct test_workload *workloads[] = {
>   	&workload__datasym,
>   	&workload__landlock,
>   	&workload__traploop,
> +	&workload__branch_not_taken_loop,
>   	&workload__inlineloop,
>   	&workload__jitdump,
>   	&workload__context_switch_loop,
> diff --git a/tools/perf/tests/shell/coresight/irq_entry_exit.sh b/tools/perf/tests/shell/coresight/irq_entry_exit.sh
> new file mode 100755
> index 0000000000000000000000000000000000000000..f164daa222b0550ceb106aa6a1215740a1432017
> --- /dev/null
> +++ b/tools/perf/tests/shell/coresight/irq_entry_exit.sh
> @@ -0,0 +1,37 @@
> +#!/bin/bash
> +# SPDX-License-Identifier: GPL-2.0
> +# CoreSight IRQ entry and exit (exclusive)
> +
> +# shellcheck source=../lib/coresight_exception.sh

No need for these anymore, see 
https://lore.kernel.org/linux-perf-users/20260921-james-perf-shellcheck-source-v1-1-adcfc107c997@linaro.org/

> +. "$(dirname "$0")/../lib/coresight_exception.sh"
> +
> +test_irq_entry_exit()
> +{
> +	# IRQs must return to the interrupted PC. Retry at different timer
> +	# frequencies if trace gaps leave no complete entry/exit pair.
> +	for freq in 1000 4000 10000; do
> +		echo "Recording timer IRQs at $freq Hz"
> +		if ! record_trace_with_cpu_clock "$freq" branch_not_taken_loop; then
> +			cat "$tmpdir/record.log"
> +			echo "Failed to record the IRQ workload"
> +			return 1
> +		fi
> +
> +		decode_trace || return 1
> +
> +		check_exception_pairs "hw int" "iret" 0
> +		result=$?
> +		case $result in
> +		0) return 0 ;;
> +		1) cat "$tmpdir/script.log"; return 1 ;;
> +		2) echo "No complete IRQ pair in this recording" ;;
> +		*) return "$result" ;;
> +		esac
> +	done
> +
> +	echo "[Skip] No complete IRQ pair after three recordings"
> +	return 2
> +}
> +
> +setup_exception_test || exit $?
> +test_irq_entry_exit
> diff --git a/tools/perf/tests/shell/lib/coresight_exception.sh b/tools/perf/tests/shell/lib/coresight_exception.sh
> new file mode 100644
> index 0000000000000000000000000000000000000000..f0133c258625147405ba4641ff7e442437fc66b8
> --- /dev/null
> +++ b/tools/perf/tests/shell/lib/coresight_exception.sh
> @@ -0,0 +1,165 @@
> +# SPDX-License-Identifier: GPL-2.0
> +# Common helpers for CoreSight exception entry and return tests.
> +
> +cleanup()
> +{
> +	case $? in
> +	0|2) rm -rf "$tmpdir" ;;
> +	*) echo "Test files retained in $tmpdir" ;;
> +	esac
> +}
> +
> +record_trace_with_cpu_clock()
> +{
> +	local clock_opts=()
> +
> +	record_freq=$1
> +	shift
> +
> +	# A zero frequency omits the cpu-clock event.
> +	if [ "$record_freq" -gt 0 ]; then
> +		# Generate timer IRQs without delivering a signal to the workload.
> +		clock_opts=(-e cpu-clock:u -F "$record_freq")
> +	fi
> +
> +	# FIFO control bounds the trace to the workload.
> +	# --kcore supplies the running kernel's instructions for decoding.
> +	taskset -c "$cpu" perf record -B --no-bpf-event --per-thread --kcore \
> +		-e cs_etm/timestamp=0/uk "${clock_opts[@]}" \
> +		-m,4M -D -1 --control fifo:"$tmpdir/ctl","$tmpdir/ack" \
> +		-o "$tmpdir/data" -- \
> +		perf test --record-ctl fifo:"$tmpdir/ctl","$tmpdir/ack" -w "$@" \
> +		> "$tmpdir/record.log" 2>&1

There's a shellcheck warning here:

   (warning): Word is of the form "A"B"C" (B indicated). Did you mean 
"ABC" or "A\"B\"C"?

You can avoid it by passing the whole path as "$cf" and "$af" like the 
other coresight tests.



  reply	other threads:[~2026-09-29 12:22 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23 15:21 [PATCH v2 00/14] perf cs-etm: Fix bogus branch samples on exceptions Leo Yan
2026-09-23 15:21 ` [PATCH v2 01/14] perf sample: Allow decoders to supply branch return addresses Leo Yan
2026-09-24 13:00   ` Adrian Hunter
2026-09-23 15:21 ` [PATCH v2 02/14] perf intel-pt: Preserve return addresses for asynchronous branches Leo Yan
2026-09-24 13:00   ` Adrian Hunter
2026-09-23 15:21 ` [PATCH v2 03/14] perf cs-etm: Break branch history when instruction memory is unavailable Leo Yan
2026-09-23 15:21 ` [PATCH v2 04/14] perf cs-etm: Centralize packet ISA initialization Leo Yan
2026-09-23 15:21 ` [PATCH v2 05/14] perf cs-etm: Use the recorded instruction size for A32 and A64 Leo Yan
2026-09-29 13:55   ` James Clark
2026-09-23 15:21 ` [PATCH v2 06/14] perf cs-etm: Mark branches that were not taken Leo Yan
2026-09-23 15:21 ` [PATCH v2 07/14] perf cs-etm: Factor out final instruction sample synthesis Leo Yan
2026-09-23 15:21 ` [PATCH v2 08/14] perf cs-etm: Centralize branch sample synthesis checks Leo Yan
2026-09-23 15:21 ` [PATCH v2 09/14] perf cs-etm: Classify exception calls using the exception packet Leo Yan
2026-09-29 14:08   ` James Clark
2026-09-23 15:21 ` [PATCH v2 10/14] perf cs-etm: Synthesize exception entries separately from branches Leo Yan
2026-09-23 15:21 ` [PATCH v2 11/14] perf tests: Check CoreSight IRQ entry and exit Leo Yan
2026-09-29 12:22   ` James Clark [this message]
2026-09-23 15:21 ` [PATCH v2 12/14] perf tests: Check CoreSight syscall " Leo Yan
2026-09-23 15:21 ` [PATCH v2 13/14] perf tests: Check CoreSight abort " Leo Yan
2026-09-23 15:21 ` [PATCH v2 14/14] perf tests: Check CoreSight emulated instruction " Leo Yan
2026-09-29 14:41 ` [PATCH v2 00/14] perf cs-etm: Fix bogus branch samples on exceptions James Clark

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