From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: shawn.sung@mediatek.com, Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>,
CK Hu <ck.hu@mediatek.com>
Subject: Re: [PATCH v3 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL
Date: Wed, 10 Jul 2024 14:02:22 +0200 [thread overview]
Message-ID: <d6517e21-8f6f-44e9-b7ac-93e0860a5e7a@collabora.com> (raw)
In-Reply-To: <20240710-alpha-blending-v3-3-289c187f9c6f@mediatek.com>
Il 10/07/24 10:52, Hsiao Chien Sung via B4 Relay ha scritto:
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
>
> Support "Pre-multiplied" alpha blending mode on in OVL.
> Before this patch, only the "coverage" mode is supported.
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +++++++++++++++++++++++++-------
> 1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index add671c38613..89b439dcf3a6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -56,8 +56,12 @@
> #define GMC_THRESHOLD_HIGH ((1 << GMC_THRESHOLD_BITS) / 4)
> #define GMC_THRESHOLD_LOW ((1 << GMC_THRESHOLD_BITS) / 8)
>
> +#define OVL_CON_CLRFMT_MAN BIT(23)
> #define OVL_CON_BYTE_SWAP BIT(24)
> -#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
> +
> +/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */
> +#define OVL_CON_RGB_SWAP BIT(25)
> +
> #define OVL_CON_CLRFMT_RGB (1 << 12)
> #define OVL_CON_CLRFMT_ARGB8888 (2 << 12)
> #define OVL_CON_CLRFMT_RGBA8888 (3 << 12)
> @@ -65,6 +69,11 @@
> #define OVL_CON_CLRFMT_BGRA8888 (OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SWAP)
> #define OVL_CON_CLRFMT_UYVY (4 << 12)
> #define OVL_CON_CLRFMT_YUYV (5 << 12)
> +#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
> +#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN)
Shouldn't this be (OVL_CON_CLRFMT_RGBA8888 | OVL_CON_CLRFMT_MAN) ??
That's getting written to the same register, so I'd guess this is like that; but
then, if it is like that, why is it PARGB888 and not PRGBA888?!
Regards,
Angelo
next prev parent reply other threads:[~2024-07-10 12:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-10 8:52 [PATCH v3 0/5] Support alpha blending in MTK display driver Hsiao Chien Sung via B4 Relay
2024-07-10 8:52 ` [PATCH v3 1/5] drm/mediatek: Support "None" blending in OVL Hsiao Chien Sung via B4 Relay
2024-07-10 8:52 ` [PATCH v3 2/5] drm/mediatek: Support "None" blending in Mixer Hsiao Chien Sung via B4 Relay
2024-07-10 12:02 ` AngeloGioacchino Del Regno
2024-07-10 8:52 ` [PATCH v3 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL Hsiao Chien Sung via B4 Relay
2024-07-10 12:02 ` AngeloGioacchino Del Regno [this message]
2024-07-11 1:35 ` Shawn Sung (宋孝謙)
2024-07-10 8:52 ` [PATCH v3 4/5] drm/mediatek: Support "Pre-multiplied" blending in Mixer Hsiao Chien Sung via B4 Relay
2024-07-10 12:03 ` AngeloGioacchino Del Regno
2024-07-10 8:52 ` [PATCH v3 5/5] drm/mediatek: Support alpha blending in display driver Hsiao Chien Sung via B4 Relay
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