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From: Adrian Hunter <adrian.hunter@intel.com>
To: "Kathpalia, Tanmay" <tanmay.kathpalia@altera.com>,
	<linux-mmc@vger.kernel.org>
Cc: <ulfh@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 8/9] mmc: sdhci-cadence: add Cadence SD6HC support
Date: Fri, 22 May 2026 08:32:19 +0300	[thread overview]
Message-ID: <d6ed9186-3081-40b5-aec3-9f3f61e6e80b@intel.com> (raw)
In-Reply-To: <3934027d-a865-40f9-8350-0027865a3682@altera.com>

On 21/05/2026 20:28, Kathpalia, Tanmay wrote:
> Hi Adrian,
> 
> Thanks for your feedback.
> 
> On 5/19/2026 8:59 PM, Adrian Hunter wrote:
>> On 11/05/2026 23:21, Tanmay Kathpalia wrote:
>>> The Cadence SD6HC is the sixth-generation SD Host Controller used in
>>> Agilex5 SoCs. Its PHY differs substantially from the SD4HC: it
>>> requires per-speed-mode IO cell timing parameters and a DLL-based
>>> delay line to achieve correct signal margins across all speed grades
>>> from Default Speed to HS400.
>>>
>>> Support is implemented in a new sdhci-cadence6.c alongside the
>>> existing v4 code, now in sdhci-cadence4.c. Shared structures and the
>>> v6 function interface are declared in a new sdhci-cadence.h header.
>>> The common driver paths select between v4 and v6 PHY operations based
>>> on the SDHCI specification version reported by the controller.
>>>
>>> The new compatible string "cdns,sd6hc" identifies SD6HC hardware in
>>> device tree.
>>>
>>> Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
>>> ---
>>>   MAINTAINERS                                   |    7 +
>>>   drivers/mmc/host/Makefile                     |    3 +-
>>>   drivers/mmc/host/sdhci-cadence.h              |  113 ++
>>>   .../{sdhci-cadence.c => sdhci-cadence4.c}     |   92 +-
>>>   drivers/mmc/host/sdhci-cadence6.c             | 1051 +++++++++++++++++
>>>   5 files changed, 1228 insertions(+), 38 deletions(-)
>>>   create mode 100644 drivers/mmc/host/sdhci-cadence.h
>>>   rename drivers/mmc/host/{sdhci-cadence.c => sdhci-cadence4.c} (91%)
>>>   create mode 100644 drivers/mmc/host/sdhci-cadence6.c
>> The new file names seem slightly misleading since sdhci-cadence4.c
>> is the main driver as well as supporting V4, whereas sdhci-cadence6.c
>> is most of V6 support.
>>
>> There doesn't seem much to gain from having a separate sdhci-cadence6.c.
>> Isn't it simpler to just put it all in 1 source file.
> 
> I believe keeping them separate improves maintainability for the
> following reasons:
> 
> 1. V4 and V6 PHY programming models are fundamentally different:
>     a. SD4HC reads pre-computed delay values directly from DT and
>     writes them one-to-one into PHY registers.
>     b. SD6HC takes only a few timing parameters (IO cell delay, delay
>     element size) from DT and derives all PHY and SDHC register
>     programming values inside the driver through a calibration
>     sequence.
> 2. The V6 PHY logic alone is more than 1000 lines. Merging it into
> the existing file would make sdhci-cadence4.c significantly harder
> to review, and maintain.
> 3. Keep code structure aligned with U-Boot, where V6 handling is
> also separated.
> 
> That said, I am open to merging into one file if you think that is
> better for maintainability in this driver. I can do that in v2.

At the very least, the file names need to be more explicit:

  The core part of the driver:	sdhci-cadence-core.c
  The V6 PHY implementation:	sdhci-cadence-phy-v6.c


  reply	other threads:[~2026-05-22  5:32 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20260511202132.5597-1-tanmay.kathpalia@altera.com>
2026-05-11 20:21 ` [PATCH v1 1/9] dt-bindings: reset: altr: add COMBOPHY_RESET for Agilex5 Tanmay Kathpalia
2026-05-12 17:33   ` Conor Dooley
2026-06-18 10:48   ` Philipp Zabel
2026-05-11 20:21 ` [PATCH v1 2/9] dt-bindings: mmc: cdns,sdhci: add SD6HC support and PHY properties Tanmay Kathpalia
2026-05-12 17:33   ` Conor Dooley
2026-05-11 20:21 ` [PATCH v1 3/9] arm64: dts: agilex5: add Cadence SD6HC controller and SOCDK enablement Tanmay Kathpalia
2026-05-15  8:38   ` Krzysztof Kozlowski
2026-05-21 17:56     ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 4/9] dt-bindings: arm: intel: add Agilex5 SOCDK eMMC board variant Tanmay Kathpalia
2026-05-11 20:21 ` [PATCH v1 5/9] arm64: dts: agilex5: add SOCDK eMMC daughter board support Tanmay Kathpalia
2026-05-15  8:37   ` Krzysztof Kozlowski
2026-05-22  6:30     ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 6/9] mmc: sdhci-cadence: rename V4 functions for V6 controller groundwork Tanmay Kathpalia
2026-05-19 15:29   ` Adrian Hunter
2026-05-21 15:53     ` Kathpalia, Tanmay
2026-05-21 16:16       ` Adrian Hunter
2026-05-11 20:21 ` [PATCH v1 7/9] mmc: sdhci-cadence: refactor driver structure for V6 controller support Tanmay Kathpalia
2026-05-19 15:29   ` Adrian Hunter
2026-05-21 17:41     ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 8/9] mmc: sdhci-cadence: add Cadence SD6HC support Tanmay Kathpalia
2026-05-19 15:29   ` Adrian Hunter
2026-05-21 17:28     ` Kathpalia, Tanmay
2026-05-22  5:32       ` Adrian Hunter [this message]
2026-05-22  6:34         ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 9/9] mmc: sdhci-cadence: add Altera Agilex5 " Tanmay Kathpalia
2026-05-27 21:01   ` Zach Miller
2026-06-01 11:54     ` Kathpalia, Tanmay

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