From: Jun Guo <jun.guo@cixtech.com>
To: fugang.duan@cixtech.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, vkoul@kernel.org, ychuang3@nuvoton.com,
schung@nuvoton.com, robin.murphy@arm.com, Frank.Li@kernel.org
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 0/2] dmaengine: arm-dma350: handle shared channel IRQ wiring on sky1
Date: Wed, 15 Jul 2026 15:42:58 +0800 [thread overview]
Message-ID: <d7f0fa37-50f2-4c71-8004-2b85e45171f4@cixtech.com> (raw)
In-Reply-To: <20260521072924.3000282-1-jun.guo@cixtech.com>
Hi all,
Gentle ping on this patch series.
I understand everyone is busy, but would appreciate any feedback or
review comments when you have a moment.
On 5/21/2026 3:29 PM, Jun Guo wrote:
> This series updates DMA-350 support for the SKY1 integration where all
> DMA
> channel interrupt outputs are wired to the same GIC SPI.
>
> Patch 1 enables DMANSECCTRL.INTREN_ANYCHINTR in the driver so
> per-channel
> interrupt status is propagated even when channels share one parent IRQ
> line.
>
> Patch 2 adds the SKY1 DMA-350 DT node and describes the channel
> interrupt
> sources using 8 channel entries, while all entries map to the same SPI.
>
> Tested on CIX SKY1 with dmatest:
> % echo 2000 > /sys/module/dmatest/parameters/timeout
> % echo 1 > /sys/module/dmatest/parameters/iterations
> % echo "" > /sys/module/dmatest/parameters/channel
> % echo 1 > /sys/module/dmatest/parameters/run
>
> Changes in v7:
> - Modify the commit log format for the driver patch.
>
> Changes in v6:
> - Drop the dt-binding update and keep the existing 8-channel interrupt
> schema.
> - Simplify driver change to a minimal fix:
> enable DMANSECCTRL.INTREN_ANYCHINTR.
> - Update SKY1 DT node to describe 8 channel interrupt entries mapped
> to one SPI.
>
> Changes in v5:
> - Fix the formatting issue in the AI tag.
> - Remove the unnecessary "cix,sky1-dma-350".
>
> Changes in v4:
> - Reword binding text to align with kernel style.
> - Revise the AI attribution to the standard format.
> - Remove redundant links from the commit log.
>
> Changes in v3:
> - Rework binding compatible description to match generic-first model.
> - Keep interrupts schema support for both 1-IRQ and 8-IRQ topologies.
> - Drop SoC match-data dependency for IRQ mode selection.
> - Detect IRQ topology via platform_irq_count() in probe path.
> - Refactor IRQ handling into a shared channel handler.
> - Enable DMANSECCTRL.INTREN_ANYCHINTR only in combined IRQ mode.
>
> Changes in v2:
> - Update to kernel standards, enhance patch description, and refactor
> driver to use match data for hardware differentiation instead of
> compatible strings.
>
> Jun Guo (2):
> dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring
> arm64: dts: cix: add sky1 DMA-350 node with channel IRQ entries
>
> arch/arm64/boot/dts/cix/sky1.dtsi | 14 ++++++++++++++
> drivers/dma/arm-dma350.c | 9 +++++++++
> 2 files changed, 23 insertions(+)
>
next prev parent reply other threads:[~2026-07-15 7:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 7:29 Jun Guo
2026-05-21 7:29 ` [PATCH v7 1/2] dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring Jun Guo
2026-07-15 12:31 ` Robin Murphy
2026-05-21 7:29 ` [PATCH v7 2/2] arm64: dts: cix: add sky1 DMA-350 node with channel IRQ entries Jun Guo
2026-07-15 7:42 ` Jun Guo [this message]
2026-07-17 12:35 ` (subset) [PATCH v7 0/2] dmaengine: arm-dma350: handle shared channel IRQ wiring on sky1 Vinod Koul
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