From: Robin Murphy <robin.murphy@arm.com>
To: Jun Guo <jun.guo@cixtech.com>,
peter.chen@cixtech.com, fugang.duan@cixtech.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,
ychuang3@nuvoton.com, schung@nuvoton.com, Frank.Li@kernel.org
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 1/2] dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring
Date: Wed, 15 Jul 2026 13:31:09 +0100 [thread overview]
Message-ID: <f9d66162-a30f-4184-aa0e-61719afbd1e1@arm.com> (raw)
In-Reply-To: <20260521072924.3000282-2-jun.guo@cixtech.com>
On 21/05/2026 8:29 am, Jun Guo wrote:
> Enable DMANSECCTRL.INTREN_ANYCHINTR during probe so channel
> interrupts are propagated when integrators wire DMA-350 channels
> onto a shared IRQ line.
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> Signed-off-by: Jun Guo <jun.guo@cixtech.com>
> ---
> drivers/dma/arm-dma350.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/dma/arm-dma350.c b/drivers/dma/arm-dma350.c
> index 84220fa83029..09403aca8bb0 100644
> --- a/drivers/dma/arm-dma350.c
> +++ b/drivers/dma/arm-dma350.c
> @@ -13,6 +13,11 @@
> #include "dmaengine.h"
> #include "virt-dma.h"
>
> +#define DMANSECCTRL 0x200
> +
> +#define NSEC_CTRL 0x0c
> +#define INTREN_ANYCHINTR_EN BIT(0)
> +
> #define DMAINFO 0x0f00
>
> #define DMA_BUILDCFG0 0xb0
> @@ -582,6 +587,10 @@ static int d350_probe(struct platform_device *pdev)
> dmac->dma.device_issue_pending = d350_issue_pending;
> INIT_LIST_HEAD(&dmac->dma.channels);
>
> + reg = readl_relaxed(base + DMANSECCTRL + NSEC_CTRL);
> + writel_relaxed(reg | INTREN_ANYCHINTR_EN,
> + base + DMANSECCTRL + NSEC_CTRL);
> +
> /* Would be nice to have per-channel caps for this... */
> memset = true;
> for (int i = 0; i < nchan; i++) {
next prev parent reply other threads:[~2026-07-15 12:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 7:29 [PATCH v7 0/2] dmaengine: arm-dma350: handle shared channel IRQ wiring on sky1 Jun Guo
2026-05-21 7:29 ` [PATCH v7 1/2] dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring Jun Guo
2026-07-15 12:31 ` Robin Murphy [this message]
2026-05-21 7:29 ` [PATCH v7 2/2] arm64: dts: cix: add sky1 DMA-350 node with channel IRQ entries Jun Guo
2026-07-15 7:42 ` [PATCH v7 0/2] dmaengine: arm-dma350: handle shared channel IRQ wiring on sky1 Jun Guo
2026-07-17 12:35 ` (subset) " Vinod Koul
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