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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: "Chang S. Bae" <chang.seok.bae@intel.com>,
	<linux-kernel@vger.kernel.org>
Cc: <x86@kernel.org>, <tglx@kernel.org>, <mingo@redhat.com>,
	<bp@alien8.de>, <dave.hansen@linux.intel.com>,
	<peterz@infradead.org>, <david.kaplan@amd.com>
Subject: Re: [PATCH v4 8/9] x86/nmi: Simplify offline microcode handler invocation
Date: Mon, 9 Nov 2026 18:03:42 -0800	[thread overview]
Message-ID: <d81a45f9-1ba2-4eed-92f2-c5152c5caa7b@intel.com> (raw)
In-Reply-To: <1994d38c-6944-451c-8416-7be4859e2ecb@intel.com>

[-- Attachment #1: Type: text/plain, Size: 1528 bytes --]

On 11/4/26 13:56, Chang S. Bae wrote:
> On 11/4/2026 10:23 AM, Chang S. Bae wrote:
>>
>> diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
>> index e3660b8b8f38..11c965445bdc 100644
>> --- a/arch/x86/kernel/nmi.c
>> +++ b/arch/x86/kernel/nmi.c
>> @@ -553,7 +553,7 @@ DEFINE_IDTENTRY_RAW(exc_nmi)
>>           raw_atomic_long_inc(&nsp->idt_calls);
>>       if (arch_cpu_is_offline(smp_processor_id())) {
>> -        if (microcode_nmi_handler_enabled())
>> +        if (IS_ENABLED(CONFIG_MICROCODE_LATE_LOADING))
>>               microcode_offline_nmi_handler();
>>           return;
>>       }
>> @@ -715,7 +715,7 @@ DEFINE_FREDENTRY_NMI(exc_nmi)
>>       irqentry_state_t irq_state;
>>       if (arch_cpu_is_offline(smp_processor_id())) {
>> -        if (microcode_nmi_handler_enabled())
>> +        if (IS_ENABLED(CONFIG_MICROCODE_LATE_LOADING))
>>               microcode_offline_nmi_handler();
>>           return;
>>       }
> 
> There is a Sashiko comment on this:
> https://sashiko.dev/#/patchset/20261104182322.578066-1- 
> chang.seok.bae%40intel.com
> 
> I thought waking up soft-offlined SMT siblings with an NMI was benign. 
> Right now the path is not explicitly gated by the use_nmi flag even 
> though the underlying mechanism is NMI-based.

As looking more, this looks like a bug to me. NMIs are raised to those 
CPUs, but not handled because the static key is off. So I ended up with 
this patch:


[-- Attachment #2: 0001-x86-microcode-Gate-soft-offlined-SMT-siblings-handli.patch --]
[-- Type: text/x-patch, Size: 2508 bytes --]

From 717f5931a0579bac239d80913b3aa4ef11e5dc7a Mon Sep 17 00:00:00 2001
From: "Chang S. Bae" <chang.seok.bae@intel.com>
Date: Fri, 6 Nov 2026 17:27:35 -0800
Subject: [PATCH] x86/microcode: Gate soft-offlined SMT siblings handling

Handling of soft-offlined SMT siblings relies on NMI events, but is
currently also executed even if use_nmi is false.

This causes a practical problem on !use_nmi systems. When SMT siblings
are soft-offlined, kick_offline_cpus() sends NMIs to them, but the
offline NMI handler is already switched off. Thus, those siblings appear
not responding, the rendezvous goes timeout, then finally the load fails.

Gate the wake-up and release paths on use_nmi. Otherwise, keep the
soft-offlined siblings in the offline state instead.

Fixes: 8f849ff63bcb ("x86/microcode: Handle "offline" CPUs correctly")
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Cc: stable@vger.kernel.org
---
Now I ended up sorting out this could be a real issue on AMD systems. But
I appreciate if someone likely from AMD could test and confirm this fix
before moving on.
---
 arch/x86/kernel/cpu/microcode/core.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 0dd0c7241c57..f1bd399f5ebf 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -498,21 +498,36 @@ static void release_offline_cpus(void)
 		per_cpu(ucode_ctrl.ctrl, cpu) = SCTRL_DONE;
 }
 
+static void keep_offline_cpus(void)
+{
+	unsigned int cpu;
+
+	for_each_cpu(cpu, &cpu_offline_mask)
+		per_cpu(ucode_ctrl.result, cpu) = UCODE_OFFLINE;
+}
+
 static void load_primary(unsigned int cpu)
 {
 	unsigned int nr_offl = cpumask_weight(&cpu_offline_mask);
 	bool proceed = true;
 
-	/* Kick soft-offlined SMT siblings if required */
-	if (!cpu && nr_offl)
-		proceed = kick_offline_cpus(nr_offl);
+	/*
+	 * Kick soft-offlined SMT siblings via NMI events, when required and
+	 * NMI use is configured. Otherwise, keep them in the offline state.
+	 */
+	if (!cpu && nr_offl) {
+		if (microcode_ops->use_nmi)
+			proceed = kick_offline_cpus(nr_offl);
+		else
+			keep_offline_cpus();
+	}
 
 	/* If the soft-offlined CPUs did not respond, abort */
 	if (proceed)
 		__load_primary(cpu);
 
 	/* Unconditionally release soft-offlined SMT siblings if required */
-	if (!cpu && nr_offl)
+	if (microcode_ops->use_nmi && !cpu && nr_offl)
 		release_offline_cpus();
 }
 
-- 
2.53.0


  reply	other threads:[~2026-11-10  2:03 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-04 18:23 [PATCH v4 0/9] x86/microcode: Refactor NMI-based rendezvous mechanism to stop-machine Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 1/9] stop_machine: Refactor multi-CPU stop glue code Chang S. Bae
2026-11-10  1:22   ` Borislav Petkov
2026-11-04 18:23 ` [PATCH v4 2/9] stop_machine: Add NMI-based execution path Chang S. Bae
2026-11-10  2:46   ` Borislav Petkov
2026-11-04 18:23 ` [PATCH v4 3/9] stop_machine: Introduce stop_machine_nmi_cpuslocked() Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 4/9] x86/apic: Implement self-NMI support Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 5/9] x86/nmi: Support NMI stop-machine handler Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 6/9] x86/microcode: Distinguish NMI control path on stop-machine callback Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 7/9] x86/microcode: Use stop-machine NMI facility Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 8/9] x86/nmi: Simplify offline microcode handler invocation Chang S. Bae
2026-11-04 21:56   ` Chang S. Bae
2026-11-10  2:03     ` Chang S. Bae [this message]
2026-11-04 18:23 ` [PATCH v4 9/9] x86/microcode: Remove microcode_nmi_handler_enable Chang S. Bae

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