From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [Patch v2 3/9] perf/x86: Update cap_user_rdpmc base on rdpmc user disable state
Date: Wed, 10 Jun 2026 09:47:50 +0800 [thread overview]
Message-ID: <d8c41bd3-d167-41d0-8b49-042b16607101@linux.intel.com> (raw)
In-Reply-To: <20260609144812.GB49951@noisy.programming.kicks-ass.net>
On 6/9/2026 10:48 PM, Peter Zijlstra wrote:
> On Tue, Jun 09, 2026 at 01:02:16PM +0800, Dapeng Mi wrote:
>
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 3bd0522afe6d..6cd95b8e31cb 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -2797,6 +2797,9 @@ void arch_perf_update_userpage(struct perf_event *event,
>> userpg->cap_user_time_zero = 0;
>> userpg->cap_user_rdpmc =
>> !!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT);
>> + if (x86_pmu_has_rdpmc_user_disable(event->pmu) &&
>> + event->hw.config & ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE)
>> + userpg->cap_user_rdpmc = 0;
>> userpg->pmc_width = x86_pmu.cntval_bits;
>>
>> if (!using_native_sched_clock() || !sched_clock_stable())
> Remember, this is evaluated very very often. So it makes more sense to
> ensure the hw.flags state is correct such that this remains a simple
> expression.
Yes, directly manipulating PERF_EVENT_FLAG_USER_READ_CNT is a simpler way.
Thanks.
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 6cd95b8e31cb..3bd0522afe6d 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -2797,9 +2797,6 @@ void arch_perf_update_userpage(struct perf_event *event,
userpg->cap_user_time_zero = 0;
userpg->cap_user_rdpmc =
!!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT);
- if (x86_pmu_has_rdpmc_user_disable(event->pmu) &&
- event->hw.config & ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE)
- userpg->cap_user_rdpmc = 0;
userpg->pmc_width = x86_pmu.cntval_bits;
if (!using_native_sched_clock() || !sched_clock_stable())
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index efd9caa3502c..afb86e5611bf 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3532,10 +3532,13 @@ static void
intel_pmu_update_rdpmc_user_disable(struct perf_event *event)
*/
if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_ALWAYS_ENABLE ||
(x86_pmu.attr_rdpmc == X86_USER_RDPMC_CONDITIONAL_ENABLE &&
- event->ctx->task))
+ event->ctx->task)) {
event->hw.config &= ~ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE;
- else
+ } else {
event->hw.config |= ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE;
+ if (event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT)
+ event->hw.flags &= ~PERF_EVENT_FLAG_USER_READ_CNT;
+ }
}
next prev parent reply other threads:[~2026-06-10 1:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-09 5:02 [Patch v2 0/9] perf/x86: Miscellaneous PMU bug fixes Dapeng Mi
2026-06-09 5:02 ` [Patch v2 1/9] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities Dapeng Mi
2026-06-09 5:02 ` [Patch v2 2/9] perf/x86: Introduce is_x86_pmu() helper Dapeng Mi
2026-06-09 5:02 ` [Patch v2 3/9] perf/x86: Update cap_user_rdpmc base on rdpmc user disable state Dapeng Mi
2026-06-09 14:48 ` Peter Zijlstra
2026-06-10 1:47 ` Mi, Dapeng [this message]
2026-06-09 5:02 ` [Patch v2 4/9] perf/x86/intel: Fallback to sw branch type decoding if no hw decoding Dapeng Mi
2026-06-09 14:49 ` Peter Zijlstra
2026-06-10 1:53 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 5/9] perf/x86/intel: Drop LBR entries whose privilege level mismatches br_sel Dapeng Mi
2026-06-09 14:52 ` Peter Zijlstra
2026-06-10 1:57 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 6/9] perf/x86/intel: Validate return value of intel_pmu_init_hybrid() Dapeng Mi
2026-06-10 8:16 ` Peter Zijlstra
2026-06-10 8:34 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 7/9] perf/x86/intel: Drop fixed-counter PEBS constraints for baseline PEBS Dapeng Mi
2026-06-10 8:20 ` Peter Zijlstra
2026-06-10 8:23 ` Peter Zijlstra
2026-06-10 8:50 ` Mi, Dapeng
2026-06-10 11:21 ` Peter Zijlstra
2026-06-10 11:42 ` Mi, Dapeng
2026-06-10 22:22 ` Peter Zijlstra
2026-06-09 5:02 ` [Patch v2 8/9] perf/core: Fix kernel register info leak via hardware skid Dapeng Mi
2026-06-10 9:16 ` Peter Zijlstra
2026-06-11 6:17 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 9/9] perf/core: Check kernel access when kernel callchains are requested Dapeng Mi
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