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From: Ben Horgan <ben.horgan@arm.com>
To: James Morse <james.morse@arm.com>
Cc: reinette.chatre@intel.com, fenghuay@nvidia.com,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, dave.martin@arm.com,
	andre.przywara@arm.com, Gavin Shan <gshan@redhat.com>
Subject: Re: [PATCH v2 05/12] arm_mpam: Ensure MBWU counters are reset on restore
Date: Fri, 2 Oct 2026 16:24:46 +0100	[thread overview]
Message-ID: <d92066cd-dbc6-47d7-b218-7dc8c97721da@arm.com> (raw)
In-Reply-To: <b61f8b82-a872-4d50-88fc-845287305011@arm.com>

Hi James,

On 02/10/2026 16:13, James Morse wrote:
> Hi Ben,
> 
> On 17/09/2026 15:56, Ben Horgan wrote:
>> When an MSC becomes inaccessible due to cpu offline CFG_MBWU_CTL is set to
>> zero in mpam_save_mbwu_state(). This is very likely to mean that the config
>> will mismatch when restoring and so the monitor will be reset. However, the
>> state may have been lost and so there are no guarantees.
> 
> Power management and kexec are the reason this is done.
> 
> I have a niggling suspicion that some hardware engineer may allow 'running counters'
> to inhibit power-down - which means the cache could stay on when all its CPUs are off.

Ah, I see.

> 
> We may kexec while these CPUs are off. Leaving the hardware in its reset state is
> the least surprising thing to do, and also means we don't get bitten by the above
> (theoretical) power management thing if the next kernel doesn't know about MPAM.

Make sense.

> 
> 
>> Ensure the reset happens by setting the reset_on_next_read
> 
> Doing this makes it more robust,
> 
> 
>> and remove the unnecessary writes from mpam_save_mbwu_state().
> 
> I think this is still a good thing to do.
> 
> 
>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
>> index d39d210574a6..6cba3ef21cc8 100644
>> --- a/drivers/resctrl/mpam_devices.c
>> +++ b/drivers/resctrl/mpam_devices.c
>> @@ -1652,6 +1652,7 @@ static int mpam_restore_mbwu_state(void *_ris)
>>  	u64 val;
>>  	struct mon_read mwbu_arg;
>>  	struct mpam_msc_ris *ris = _ris;
>> +	struct msmon_mbwu_state *mbwu_state;
>>  	struct mpam_msc *msc = ris->vmsc->msc;
>>  	struct mpam_class *class = ris->vmsc->comp->class;
>>  
>> @@ -1659,16 +1660,20 @@ static int mpam_restore_mbwu_state(void *_ris)
>>  		if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc)))
>>  			return -EIO;
>>  
>> -		if (!ris->mbwu_state[i].enabled) {
>> +		mbwu_state = &ris->mbwu_state[i];
>> +
>> +		if (!mbwu_state->enabled) {
>>  			mpam_mon_sel_unlock(msc);
>>  			continue;
>>  		}
>>  
>>  		mwbu_arg.ris = ris;
>> -		mwbu_arg.ctx = &ris->mbwu_state[i].cfg;
>> +		mwbu_arg.ctx = &mbwu_state->cfg;
>>  		mwbu_arg.type = mpam_msmon_choose_counter(class);
>>  		mwbu_arg.val = &val;
>>  
>> +		mbwu_state->reset_on_next_read = true;
>> +
>>  		mpam_mon_sel_unlock(msc);
>>  
>>  		__ris_msmon_read(&mwbu_arg);
>> @@ -1701,15 +1706,11 @@ static int mpam_save_mbwu_state(void *arg)
>>  
>>  		cur_flt = mpam_read_monsel_reg(msc, CFG_MBWU_FLT);
>>  		cur_ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
> 
>> -		mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0);
> 
> I plan to drop this line,

Ok, I agree.

Thanks,

Ben

> 
> 
>> -		if (mpam_ris_has_mbwu_long_counter(ris)) {
>> +		if (mpam_ris_has_mbwu_long_counter(ris))
>>  			val = mpam_msc_read_mbwu_l(msc);
>> -			mpam_msc_zero_mbwu_l(msc);
>> -		} else {
>> +		else
>>  			val = mpam_read_monsel_reg(msc, MBWU);
>> -			mpam_write_monsel_reg(msc, MBWU, 0);
>> -		}
> 
> But keep this. With reset_on_next_read the driver won't consume the stale value, and
> that approach also covers the hardware resetting into unusual states.
> 
> 
> Reviewed-by: James Morse <james.morse@arm.com>
> 
> 
> Thanks,
> 
> James


  reply	other threads:[~2026-10-02 15:24 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17 14:56 [PATCH v2 00/12] arm_mpam: minor fixes at v7.2 Ben Horgan
2026-09-17 14:56 ` [PATCH v2 01/12] arm_mpam: Move MPAMF_ECR write helpers to allow reuse Ben Horgan
2026-09-22  5:41   ` Gavin Shan
2026-10-02 14:58   ` James Morse
2026-09-17 14:56 ` [PATCH v2 02/12] arm_mpam: Restore the error interrupt enable from mpam_cpu_online() Ben Horgan
2026-09-22  5:42   ` Gavin Shan
2026-10-02 15:00   ` James Morse
2026-09-17 14:56 ` [PATCH v2 03/12] arm_mpam: Set mpam_feat_msmon_mbwu_31counter when there are bandwidth counters Ben Horgan
2026-09-22  5:42   ` Gavin Shan
2026-10-02 15:01   ` James Morse
2026-09-17 14:56 ` [PATCH v2 04/12] arm_mpam: Add missing mon_sel locking in MBWU save and restore Ben Horgan
2026-10-02 15:01   ` James Morse
2026-10-02 15:28     ` Ben Horgan
2026-09-17 14:56 ` [PATCH v2 05/12] arm_mpam: Ensure MBWU counters are reset on restore Ben Horgan
2026-09-22  5:43   ` Gavin Shan
2026-10-02 15:13   ` James Morse
2026-10-02 15:24     ` Ben Horgan [this message]
2026-09-17 14:56 ` [PATCH v2 06/12] arm_mpam: Use __ris_msmon_read() for saving MBWU state Ben Horgan
2026-10-02 15:15   ` James Morse
2026-10-02 15:22     ` Ben Horgan
2026-10-02 16:21       ` James Morse
2026-09-17 14:56 ` [PATCH v2 07/12] arm_mpam: Initialize all of struct mon_read in mpam_restore_mbwu_state() Ben Horgan
2026-10-02 15:15   ` James Morse
2026-09-17 14:56 ` [PATCH v2 08/12] arm_mpam: resctrl: Correct check that existing class is L3 Ben Horgan
2026-09-22  5:43   ` Gavin Shan
2026-10-02 15:15   ` James Morse
2026-09-17 14:56 ` [PATCH v2 09/12] arm_mpam: resctrl: Make read_mon_cdp_safe() self consistent Ben Horgan
2026-09-22  5:44   ` Gavin Shan
2026-10-02 15:17   ` James Morse
2026-09-17 14:56 ` [PATCH v2 10/12] arm_mpam: Don't loop forever if there is the maximum possible amount of PARTIDs Ben Horgan
2026-09-22  5:44   ` Gavin Shan
2026-10-02 15:18   ` James Morse
2026-09-17 14:56 ` [PATCH v2 11/12] arm_mpam: Switch to kvzmalloc_objs() for allocation of component cfg Ben Horgan
2026-09-22  5:45   ` Gavin Shan
2026-10-02 15:18   ` James Morse
2026-09-17 14:56 ` [PATCH v2 12/12] arm_mpam: resctrl: Don't stop early when tearing down a class Ben Horgan
2026-09-22  5:45   ` Gavin Shan

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