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From: Ben Horgan <ben.horgan@arm.com>
To: James Morse <james.morse@arm.com>
Cc: reinette.chatre@intel.com, fenghuay@nvidia.com,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, dave.martin@arm.com,
	andre.przywara@arm.com, Gavin Shan <gshan@redhat.com>
Subject: Re: [PATCH v2 06/12] arm_mpam: Use __ris_msmon_read() for saving MBWU state
Date: Fri, 2 Oct 2026 16:22:06 +0100	[thread overview]
Message-ID: <e1bb7833-c6f5-4582-9769-19a6437d07fd@arm.com> (raw)
In-Reply-To: <32c85a0b-48f3-407f-bc60-a58255806683@arm.com>

Hi James,

On 02/10/2026 16:15, James Morse wrote:
> Hi Ben,
> 
> On 17/09/2026 15:56, Ben Horgan wrote:
>> mbwu_save_mbwu_state() reads the MBWU counters and adds that to a saved
>> correction value. However, the type of counter to read is determined by the
>> RIS rather than the class and overflow is not taken into account. Fix this
>> and mitigate against further divergence by using a locked variant of the
>> same helper used for user monitor reads, __ris_msmon_read(). Using the
>> locked variant avoids having to drop and retake the mon_sel lock. If the
>> lock was dropped, an interleaved monitor read which detects overflow would
>> cause the overflow not to be accounted for in the saved value of
>> mbwu_state->correction. The correction is no longer updated for disabled
>> counters but this has no effect as the saved values are not expected to be
>> useful for disabled counters.
> 
>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
>> index 6cba3ef21cc8..62562ce2f9aa 100644
>> --- a/drivers/resctrl/mpam_devices.c
>> +++ b/drivers/resctrl/mpam_devices.c
> 
> 
>> @@ -1688,10 +1693,12 @@ static int mpam_save_mbwu_state(void *arg)
>>  	int i;
>>  	u64 val;
>>  	struct mon_cfg *cfg;
>> +	struct mon_read mbwu_arg;
>>  	u32 cur_flt, cur_ctl, mon_sel;
>>  	struct mpam_msc_ris *ris = arg;
>>  	struct msmon_mbwu_state *mbwu_state;
>>  	struct mpam_msc *msc = ris->vmsc->msc;
>> +	struct mpam_class *class = ris->vmsc->comp->class;
>>  
>>  	for (i = 0; i < ris->props.num_mbwu_mon; i++) {
>>  		if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc)))
>> @@ -1707,17 +1714,31 @@ static int mpam_save_mbwu_state(void *arg)
>>  		cur_flt = mpam_read_monsel_reg(msc, CFG_MBWU_FLT);
>>  		cur_ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
> 
>>  		cfg->mon = i;
>>  		cfg->pmg = FIELD_GET(MSMON_CFG_x_FLT_PMG, cur_flt);
>>  		cfg->match_pmg = FIELD_GET(MSMON_CFG_x_CTL_MATCH_PMG, cur_ctl);
>>  		cfg->partid = FIELD_GET(MSMON_CFG_x_FLT_PARTID, cur_flt);
>>  		mbwu_state->enabled = FIELD_GET(MSMON_CFG_x_CTL_EN, cur_ctl);
>> +
>> +		if (!mbwu_state->enabled) {
>> +			mpam_mon_sel_unlock(msc);
>> +			continue;
>> +		}
>> +
>> +		val = 0;
>> +		mbwu_arg = (struct mon_read) {
>> +			.ris = ris,
>> +			.ctx = cfg,
>> +			.type = mpam_msmon_choose_counter(class),
>> +			.val = &val,
>> +		};
>> +
>> +		__ris_msmon_read_locked(&mbwu_arg);
>> +
>> +		mbwu_state->reset_on_next_read = true;
>> +		if (!mbwu_arg.err)
>> +			mbwu_state->correction = val;
> 
> += val?
> 
> If the same CPU is offlined twice, the correction should hold the sum of both values.
> The idea is the 'correction' is anything that has been consumed, and isn't in the hardware
> register. (e.g. due to overflow or reset)

I agree with your definition of correction but isn't that taken into
account in __ris_msmon_read_locked().

Surely +=val here would lead to double counting.

Thanks,

Ben

> 
> With that:
> Reviewed-by: James Morse <james.morse@arm.com>
> 
> 
>> +
>>  		mpam_mon_sel_unlock(msc);
>>  	}
>>  
> 
> 
> Thanks,
> 
> James


  reply	other threads:[~2026-10-02 15:22 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17 14:56 [PATCH v2 00/12] arm_mpam: minor fixes at v7.2 Ben Horgan
2026-09-17 14:56 ` [PATCH v2 01/12] arm_mpam: Move MPAMF_ECR write helpers to allow reuse Ben Horgan
2026-09-22  5:41   ` Gavin Shan
2026-10-02 14:58   ` James Morse
2026-09-17 14:56 ` [PATCH v2 02/12] arm_mpam: Restore the error interrupt enable from mpam_cpu_online() Ben Horgan
2026-09-22  5:42   ` Gavin Shan
2026-10-02 15:00   ` James Morse
2026-09-17 14:56 ` [PATCH v2 03/12] arm_mpam: Set mpam_feat_msmon_mbwu_31counter when there are bandwidth counters Ben Horgan
2026-09-22  5:42   ` Gavin Shan
2026-10-02 15:01   ` James Morse
2026-09-17 14:56 ` [PATCH v2 04/12] arm_mpam: Add missing mon_sel locking in MBWU save and restore Ben Horgan
2026-10-02 15:01   ` James Morse
2026-10-02 15:28     ` Ben Horgan
2026-09-17 14:56 ` [PATCH v2 05/12] arm_mpam: Ensure MBWU counters are reset on restore Ben Horgan
2026-09-22  5:43   ` Gavin Shan
2026-10-02 15:13   ` James Morse
2026-10-02 15:24     ` Ben Horgan
2026-09-17 14:56 ` [PATCH v2 06/12] arm_mpam: Use __ris_msmon_read() for saving MBWU state Ben Horgan
2026-10-02 15:15   ` James Morse
2026-10-02 15:22     ` Ben Horgan [this message]
2026-10-02 16:21       ` James Morse
2026-09-17 14:56 ` [PATCH v2 07/12] arm_mpam: Initialize all of struct mon_read in mpam_restore_mbwu_state() Ben Horgan
2026-10-02 15:15   ` James Morse
2026-09-17 14:56 ` [PATCH v2 08/12] arm_mpam: resctrl: Correct check that existing class is L3 Ben Horgan
2026-09-22  5:43   ` Gavin Shan
2026-10-02 15:15   ` James Morse
2026-09-17 14:56 ` [PATCH v2 09/12] arm_mpam: resctrl: Make read_mon_cdp_safe() self consistent Ben Horgan
2026-09-22  5:44   ` Gavin Shan
2026-10-02 15:17   ` James Morse
2026-09-17 14:56 ` [PATCH v2 10/12] arm_mpam: Don't loop forever if there is the maximum possible amount of PARTIDs Ben Horgan
2026-09-22  5:44   ` Gavin Shan
2026-10-02 15:18   ` James Morse
2026-09-17 14:56 ` [PATCH v2 11/12] arm_mpam: Switch to kvzmalloc_objs() for allocation of component cfg Ben Horgan
2026-09-22  5:45   ` Gavin Shan
2026-10-02 15:18   ` James Morse
2026-09-17 14:56 ` [PATCH v2 12/12] arm_mpam: resctrl: Don't stop early when tearing down a class Ben Horgan
2026-09-22  5:45   ` Gavin Shan

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