From: "Kumar, Udit" <u-kumar1@ti.com>
To: Siddharth Vadapalli <s-vadapalli@ti.com>, <nm@ti.com>,
<vigneshr@ti.com>, <kristo@kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <srk@ti.com>
Subject: Re: [PATCH v2 7/7] arm64: dts: ti: k3-j784s4-j742s2-main-common: switch to 64-bit address space for PCIe0 and PCIe1
Date: Wed, 23 Apr 2025 09:37:39 +0530 [thread overview]
Message-ID: <d987c7f7-181a-4d1a-a88c-3b6c5aac6f63@ti.com> (raw)
In-Reply-To: <20250422120042.3746004-8-s-vadapalli@ti.com>
On 4/22/2025 5:30 PM, Siddharth Vadapalli wrote:
> The PCIe0 and PCIe1 instances of PCIe in J742S2 and J784S4 SoCs support:
> 1. 128 MB address region in the 32-bit address space
> 2. 4 GB address region in the 64-bit address space
>
> The default configuration is that of a 128 MB address region in the
> 32-bit address space. While this might be sufficient for most use-cases,
> it is insufficient for supporting use-cases which require larger address
> spaces. Therefore, switch to using the 64-bit address space with a 4 GB
> address region.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
>
> [..]
> + <0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
> dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
> status = "disabled";
> };
next prev parent reply other threads:[~2025-04-23 4:07 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-22 12:00 [PATCH v2 0/7] AM64 and J7X DT: Enable PCIe 64-bit Address Space Siddharth Vadapalli
2025-04-22 12:00 ` [PATCH v2 1/7] arm64: dts: ti: k3-am64-main: switch to 64-bit address space for PCIe0 Siddharth Vadapalli
2025-04-22 12:00 ` [PATCH v2 2/7] arm64: dts: ti: k3-j7200-main: switch to 64-bit address space for PCIe1 Siddharth Vadapalli
2025-04-22 12:00 ` [PATCH v2 3/7] arm64: dts: ti: k3-j721e: add ranges for PCIe0 DAT1 and PCIe1 DAT1 Siddharth Vadapalli
2025-04-22 14:11 ` Kumar, Udit
2025-04-22 12:00 ` [PATCH v2 4/7] arm64: dts: ti: k3-j721e-main: switch to 64-bit address space for PCIe0 and PCIe1 Siddharth Vadapalli
2025-04-22 12:00 ` [PATCH v2 5/7] arm64: dts: ti: k3-j721s2-main: switch to 64-bit address space for PCIe1 Siddharth Vadapalli
2025-04-22 12:00 ` [PATCH v2 6/7] arm64: dts: ti: k3-j722s-main: switch to 64-bit address space for PCIe0 Siddharth Vadapalli
2025-04-22 12:00 ` [PATCH v2 7/7] arm64: dts: ti: k3-j784s4-j742s2-main-common: switch to 64-bit address space for PCIe0 and PCIe1 Siddharth Vadapalli
2025-04-23 4:07 ` Kumar, Udit [this message]
2025-04-28 14:32 ` [PATCH v2 0/7] AM64 and J7X DT: Enable PCIe 64-bit Address Space Kumar, Udit
2025-05-02 14:44 ` Nishanth Menon
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