Re: [RFC PATCH 0/2] arm64: qcom: Add BWMON support for SA8775p

[Tengfei Fan <quic_tengfan@quicinc.com>]

On 6/17/2024 5:43 PM, Dmitry Baryshkov wrote:
> On Mon, Jun 17, 2024 at 05:29:38PM GMT, Tengfei Fan wrote:
>> Add CPU and LLCC BWMON nodes and their corresponding OPP tables for
>> SA8775p SoC.
> 
> This series is marked as RFC, Request For Comments. What kind of
> comments are expected for the series?
> 

I found that the BWMON patch for x1e80100[1] is currently under review. 
There are upstream comments suggesting that we reference the same shared 
OPP table from all the BWMONs that share the same OPP table. However, 
there will be some DTBS CHECK warnings[2] if we do reference the same 
shared OPP table.

Therefore, I pushed this patch series to collect some comments on 
whether we can have separate OPP tables for each BWMON, as the OPP table 
of "pmu@90b5400" and "pmu@90b6400" in this patch series.

[1] 
https://lore.kernel.org/lkml/4ef1d9a9-6a0e-4324-b6d5-2ae225855b03@linaro.org/

[2]
arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pmu@90b5400: 'opp-table' is a 
required property from schema $id:
http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#

>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>
>> This patch series depends on patch series:
>> "[PATCH 2/4] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances"
>> https://lore.kernel.org/lkml/20240604011157.2358019-3-quic_sibis@quicinc.com/
>>
>> Tengfei Fan (2):
>>    dt-bindings: interconnect: qcom-bwmon: Document SA8775p bwmon
>>      compatibles
>>    arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMON
>>
>>   .../interconnect/qcom,msm8998-bwmon.yaml      |   2 +
>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 115 ++++++++++++++++++
>>   2 files changed, 117 insertions(+)
>>
>>
>> base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0
>> -- 
>> 2.25.1
>>
> 

-- 
Thx and BRs,
Tengfei Fan