Re: [PATCH v6 03/18] x86/resctrl: Add PLZA configuration definitions and data structures

["Moger, Babu" <bmoger@amd.com>]

Hi Reinette,

On 10/20/2026 4:47 PM, Reinette Chatre wrote:
> Hi Babu,
> 
> On 10/20/26 11:02 AM, Babu Moger wrote:
>> On 10/19/26 11:16, Reinette Chatre wrote:
>>> On 10/15/26 4:07 PM, Babu Moger wrote:
>>>> On 10/15/26 09:22, Reinette Chatre wrote:
>>>>> On 10/1/26 8:10 AM, Babu Moger wrote:
>>>>>> Privilege Level Zero Association (PLZA) enables the kernel to switch to
>>>>>> a different CLOSID and/or RMID than those used in user mode when entering
>>>>>> kernel mode. CLOSID and RMID selection are independent and can be
>>>>>> configured separately.
>>>>>
>>>>> That CLOSID and RMID are independent on x86 is clear to me. That they can be
>>>>> configured separately is not clear to me in this context. What does this
>>>>> "separate configuration" refer to? Looking at the later patches kernel
>>>>> mode allocation and monitoring associations are always configured together
>>>>> and written to same MSR at the same time?
>>>>
>>>>
>>>> Good point. Its confusing.  What I meant is that allocation (CLOSID)
>>>> and monitoring (RMID) associations are independent PLZA features and
>>>> can be enabled independently in hardware. For example, a platform
>>>> may enable kernel mode CLOSID association without enabling kernel
>>>> mode RMID association, or vice versa.
>>>>
>>>> Yes. The kernel interface configures both together because they are carried in the same IA32_PQR_ASSOC MSR update.
>>>>
>>>> How about?
>>>>
>>>> Privilege Level Zero Association (PLZA) enables the kernel to use a
>>>> different CLOSID and/or RMID in kernel mode than in user mode.
>>>> Allocation (CLOSID) and monitoring (RMID) associations are
>>>> independent PLZA features and may be enabled independently by
>>>> hardware.
>>>
>>> Which CLOSID (MSR_IA32_PQR_PLZA_ASSOC.closid) and/or RMID (MSR_IA32_PQR_PLZA_ASSOC.rmid)
>>> is used in kernel mode is different from whether the CLOSID (MSR_IA32_PQR_PLZA_ASSOC.closid_en)
>>> and/or RMID (MSR_IA32_PQR_PLZA_ASSOC.rmid_en) is used in kernel mode.
>>>
>>> This series uses the high level "allocation and monitoring association" term
>>> interchangeably for both of these meanings and doing so causes confusion.
>>>
>>> Please pick specific terms to refer to the CLOSID/RMID assigned to kernel mode vs
>>> whether the CLOSID/RMID assignment is enabled and use it throughout the series.
>>>
>>
>> Another attempt to capture all the details:
>>
>> "Privilege Level Zero Association (PLZA) enables the kernel to use a
>> different CLOSID and/or RMID than those used in user mode when
>> executing in kernel mode. CLOSID and RMID selection can be
>> configured independently.
> 
> First sentence already contains "and/or" so I think the last sentence can just
> be dropped.
> 

ok.

>>
>> The kernel mode CLOSID and RMID are specified by
>> MSR_IA32_PQR_PLZA_ASSOC.closid and MSR_IA32_PQR_PLZA_ASSOC.rmid,
>> respectively. plza_en activates the PLZA operation, while closid_en
>> and rmid_en independently control whether the corresponding kernel
>> mode CLOSID or RMID is used.
> 
> Please aim to provide higher level description than what can be seen
> from the patch.
> 

Ack.

>>
>> Make the register and its field layout available so kernel mode
>> allocation (CLOSID) and monitoring (RMID) selection can be
>> configured independently."
> 
> Apologies but I really do not understand why the "independently"
> distinction is needed since these values are always programmed together.

No problem. This looks good.

> 
> Here is an attempt, but it is written without knowing which terms you have
> picked to stick with:
> 
>    x86/resctrl: Add PLZA MSR definition and field layout
> 
>    Privilege Level Zero Association (PLZA) enables a CPU to use a different
>    CLOSID and/or RMID when executing in kernel mode than those used in user
>    mode.
> 
>    PLZA is programmed per CPU through MSR_IA32_PQR_PLZA_ASSOC, which contains
>    the kernel mode CLOSID and RMID, an enable bit for each, and a bit that
>    enables PLZA on the CPU. All fields except the PLZA enable bit must be
>    programmed identically on every CPU in a domain.
> 
>    Make the register and its field layout available in preparation for resctrl
>    support of kernel mode allocation and monitoring.
> 

thanks
Babu