From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: esteuwu@proton.me, Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Danila Tikhonov <danila@jiaxyga.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] clk: qcom: dispcc-sm8450: Migrate to qcom_cc_driver_data
Date: Mon, 13 Jul 2026 12:47:39 +0200 [thread overview]
Message-ID: <dcea3653-1428-49ee-9287-a1b27da2003b@oss.qualcomm.com> (raw)
In-Reply-To: <20260711-sm8450-qol-dispcc-v2-2-fc1a07ac5601@proton.me>
On 7/12/26 5:10 AM, Esteban Urrutia via B4 Relay wrote:
> From: Esteban Urrutia <esteuwu@proton.me>
>
> Migrate to qcom_cc_driver_data, which is used by other clock controller
> drivers.
>
> Signed-off-by: Esteban Urrutia <esteuwu@proton.me>
> ---
[...]
> /* Enable clock gating for MDP clocks */
> regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
This would ideally become regmap_set_bits(..., BIT(4)) in desc->clk_regs_configure
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-07-13 10:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-12 3:10 [PATCH v2 0/3] SM8450 QoL changes (dispcc) Esteban Urrutia via B4 Relay
2026-07-12 3:10 ` [PATCH v2 1/3] clk: qcom: dispcc-sm8450: Fix disp_cc_mdss_mdp_clk_src ops Esteban Urrutia via B4 Relay
2026-07-13 10:50 ` Konrad Dybcio
2026-07-12 3:10 ` [PATCH v2 2/3] clk: qcom: dispcc-sm8450: Migrate to qcom_cc_driver_data Esteban Urrutia via B4 Relay
2026-07-13 10:47 ` Konrad Dybcio [this message]
2026-07-13 14:05 ` Esteban Urrutia
2026-07-12 3:10 ` [PATCH v2 3/3] clk: qcom: dispcc-sm8450: Keep pll types as is for SM8475 Esteban Urrutia via B4 Relay
2026-07-13 10:57 ` Konrad Dybcio
2026-07-13 22:47 ` Esteban Urrutia
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