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* [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible
@ 2024-07-09 14:47 Tengfei Fan
  2024-07-09 14:47 ` [PATCH v2 1/2] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY Tengfei Fan
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Tengfei Fan @ 2024-07-09 14:47 UTC (permalink / raw)
  To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: kernel, linux-arm-msm, linux-phy, devicetree, linux-kernel, Tengfei Fan

Introduce support for the QCS9100 SoC device tree (DTSI) and the
QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
While the QCS9100 platform is still in the early design stage, the
QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
mounts the QCS9100 SoC instead of the SA8775p SoC.

The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and
all the compatible strings will be updated from "SA8775p" to "QCS9100".
The QCS9100 device tree patches will be pushed after all the device tree
bindings and device driver patches are reviewed.

The final dtsi will like:
https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-3-quic_tengfan@quicinc.com/

The detailed cover letter reference:
https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
Changes in v2:
  - Split huge patch series into different patch series according to
    subsytems
  - Update patch commit message

prevous disscussion here:
[1] v1: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/

---
Tengfei Fan (2):
      dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY
      phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100

 .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml         | 4 ++++
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c                            | 6 ++++++
 2 files changed, 10 insertions(+)
---
base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233
change-id: 20240709-add_qcs9100_pcie_phy_compatible-531a12dc2311

Best regards,
-- 
Tengfei Fan <quic_tengfan@quicinc.com>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 1/2] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY
  2024-07-09 14:47 [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan
@ 2024-07-09 14:47 ` Tengfei Fan
  2024-07-09 14:47 ` [PATCH v2 2/2] phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100 Tengfei Fan
  2024-07-29 10:09 ` [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan
  2 siblings, 0 replies; 4+ messages in thread
From: Tengfei Fan @ 2024-07-09 14:47 UTC (permalink / raw)
  To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: kernel, linux-arm-msm, linux-phy, devicetree, linux-kernel, Tengfei Fan

Add devicetree YAML binding for Qualcomm QMP PCIe PHY for QCS9100
platform.
QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p
platform use non-SCMI resource. In the future, the SA8775p platform will
move to use SCMI resources and it will have new sa8775p-related device
tree. Consequently, introduce "qcom,qcs9100-qmp-gen4x2-pcie-phy" and
"qcom,qcs9100-qmp-gen4x4-pcie-phy" to describe non-SCMI based PCIe PHY.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index 03dbd02cf9e7..d128ac8cb583 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
@@ -16,6 +16,8 @@ description:
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-qmp-gen4x2-pcie-phy
+      - qcom,qcs9100-qmp-gen4x4-pcie-phy
       - qcom,sa8775p-qmp-gen4x2-pcie-phy
       - qcom,sa8775p-qmp-gen4x4-pcie-phy
       - qcom,sc8180x-qmp-pcie-phy
@@ -181,6 +183,8 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-qmp-gen4x2-pcie-phy
+              - qcom,qcs9100-qmp-gen4x4-pcie-phy
               - qcom,sa8775p-qmp-gen4x2-pcie-phy
               - qcom,sa8775p-qmp-gen4x4-pcie-phy
     then:

-- 
2.25.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 2/2] phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100
  2024-07-09 14:47 [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan
  2024-07-09 14:47 ` [PATCH v2 1/2] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY Tengfei Fan
@ 2024-07-09 14:47 ` Tengfei Fan
  2024-07-29 10:09 ` [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan
  2 siblings, 0 replies; 4+ messages in thread
From: Tengfei Fan @ 2024-07-09 14:47 UTC (permalink / raw)
  To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: kernel, linux-arm-msm, linux-phy, devicetree, linux-kernel, Tengfei Fan

Add support for x4 lane end point mode PHY found on QCS9100 platform.
Reusing existing serdes and pcs_misc table for EP and moved
BIAS_EN_CLKBUFLR_EN register from RC serdes table to common serdes
table as this register is part of both RC and EP.
QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p
platform use non-SCMI resource. In the future, the SA8775p platform will
move to use SCMI resources and it will have new sa8775p-related device
tree. Consequently, introduce "qcom,qcs9100-qmp-gen4x2-pcie-phy" and
"qcom,qcs9100-qmp-gen4x4-pcie-phy" to the qmp pcie device match table.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 5b36cc7ac78b..d462b21706ee 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -4339,6 +4339,12 @@ static const struct of_device_id qmp_pcie_of_match_table[] = {
 	}, {
 		.compatible = "qcom,msm8998-qmp-pcie-phy",
 		.data = &msm8998_pciephy_cfg,
+	}, {
+		.compatible = "qcom,qcs9100-qmp-gen4x2-pcie-phy",
+		.data = &sa8775p_qmp_gen4x2_pciephy_cfg,
+	}, {
+		.compatible = "qcom,qcs9100-qmp-gen4x4-pcie-phy",
+		.data = &sa8775p_qmp_gen4x4_pciephy_cfg,
 	}, {
 		.compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy",
 		.data = &sa8775p_qmp_gen4x2_pciephy_cfg,

-- 
2.25.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible
  2024-07-09 14:47 [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan
  2024-07-09 14:47 ` [PATCH v2 1/2] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY Tengfei Fan
  2024-07-09 14:47 ` [PATCH v2 2/2] phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100 Tengfei Fan
@ 2024-07-29 10:09 ` Tengfei Fan
  2 siblings, 0 replies; 4+ messages in thread
From: Tengfei Fan @ 2024-07-29 10:09 UTC (permalink / raw)
  To: Vinod Koul, Kishon Vijay Abraham I, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: kernel, linux-arm-msm, linux-phy, devicetree, linux-kernel



On 7/9/2024 10:47 PM, Tengfei Fan wrote:
> Introduce support for the QCS9100 SoC device tree (DTSI) and the
> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
> While the QCS9100 platform is still in the early design stage, the
> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
> mounts the QCS9100 SoC instead of the SA8775p SoC.
> 
> The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and
> all the compatible strings will be updated from "SA8775p" to "QCS9100".
> The QCS9100 device tree patches will be pushed after all the device tree
> bindings and device driver patches are reviewed.
> 
> The final dtsi will like:
> https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-3-quic_tengfan@quicinc.com/
> 
> The detailed cover letter reference:
> https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
> Changes in v2:
>    - Split huge patch series into different patch series according to
>      subsytems
>    - Update patch commit message
> 
> prevous disscussion here:
> [1] v1: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/
> 
> ---
> Tengfei Fan (2):
>        dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY
>        phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100
> 
>   .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml         | 4 ++++
>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c                            | 6 ++++++
>   2 files changed, 10 insertions(+)
> ---
> base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233
> change-id: 20240709-add_qcs9100_pcie_phy_compatible-531a12dc2311
> 
> Best regards,

After considering the feedback provided on the subject, We have decided
to keep current SA8775p compatible and ABI compatibility in drivers.
Let's close this session and ignore all the current patches here.
Thank you for your input.

-- 
Thx and BRs,
Tengfei Fan

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2024-07-29 10:09 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2024-07-09 14:47 [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan
2024-07-09 14:47 ` [PATCH v2 1/2] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY Tengfei Fan
2024-07-09 14:47 ` [PATCH v2 2/2] phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100 Tengfei Fan
2024-07-29 10:09 ` [PATCH v2 0/2] phy: qcom-qmp-pcie: Add QCS9100 x4 lane EP compatible Tengfei Fan

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