From: Philipp Zabel <p.zabel@pengutronix.de>
To: Biju <biju.das.au@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-renesas-soc@vger.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Subject: Re: [PATCH v3 07/13] drm: renesas: rz-du: Add support for RZ/G3L LVDS encoder
Date: Mon, 31 Aug 2026 11:16:37 +0200 [thread overview]
Message-ID: <dfcd32d28aa0a450abfaa852e819ee7c25c925ee.camel@pengutronix.de> (raw)
In-Reply-To: <20260826174854.199139-8-biju.das.jz@bp.renesas.com>
On Mi, 2026-08-26 at 18:48 +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Add support for the RZ/G3L LVDS encoder driver. It operates in single-link
> mode with 4 lanes (Data) + 1 lane (Clock) and supports pixel clock rates
> from 25 to 87 MHz. The LVDS module cannot be used at the same time as
> MIPI-DSI. However, LVDS and the DSI interface share a peripheral clock and
> the MIPI_DSI_PRESET_N reset signal. Also, the MIPI_DSI_CMN_RSTB and
> MIPI_DSI_ARESET_N reset signals must be asserted before using the LVDS
> module.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
[...]
> ---
> drivers/gpu/drm/renesas/rz-du/Kconfig | 13 +
> drivers/gpu/drm/renesas/rz-du/Makefile | 1 +
> drivers/gpu/drm/renesas/rz-du/rzg3l_lvds.c | 295 ++++++++++++++++++
> .../gpu/drm/renesas/rz-du/rzg3l_lvds_regs.h | 25 ++
> 4 files changed, 334 insertions(+)
> create mode 100644 drivers/gpu/drm/renesas/rz-du/rzg3l_lvds.c
> create mode 100644 drivers/gpu/drm/renesas/rz-du/rzg3l_lvds_regs.h
>
[...]
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg3l_lvds.c b/drivers/gpu/drm/renesas/rz-du/rzg3l_lvds.c
> new file mode 100644
> index 000000000000..2a7ae67ff08d
> --- /dev/null
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg3l_lvds.c
> @@ -0,0 +1,295 @@
[...]
> +static int rzg3l_lvds_probe(struct platform_device *pdev)
> +{
> + struct reset_control *rstc, *arstc;
> + struct device *dev = &pdev->dev;
> + struct rzg3l_lvds *lvds;
> + void __iomem *base;
> + int ret;
> +
> + lvds = devm_drm_bridge_alloc(dev, struct rzg3l_lvds, bridge,
> + &rzg3l_lvds_bridge_ops);
> + if (IS_ERR(lvds))
> + return PTR_ERR(lvds);
> +
> + lvds->dev = dev;
> + lvds->bridge.of_node = pdev->dev.of_node;
> +
> + base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(base))
> + return PTR_ERR(base);
> +
> + lvds->regmap = devm_regmap_init_mmio(dev, base, &rzg3l_lvds_regmap_config);
> + if (IS_ERR(lvds->regmap))
> + return dev_err_probe(dev, PTR_ERR(lvds->regmap),
> + "failed to init regmap\n");
> +
> + lvds->dotclk = devm_clk_get(dev, "dotclk");
> + if (IS_ERR(lvds->dotclk))
> + return PTR_ERR(lvds->dotclk);
> +
> + rstc = devm_reset_control_get_exclusive(dev, "rst");
> + if (IS_ERR(rstc))
> + return dev_err_probe(dev, PTR_ERR(rstc), "failed to get rst\n");
> +
> + arstc = devm_reset_control_get_exclusive(dev, "arst");
> + if (IS_ERR(arstc))
> + return dev_err_probe(dev, PTR_ERR(arstc),
> + "failed to get arst\n");
It would be nice to have a comment about the two MIPI DSI resets having
to be asserted here as well.
Also, it looks like you could pair these two ...
> +
> + lvds->prstc = devm_reset_control_get_exclusive(dev, "prst");
> + if (IS_ERR(lvds->prstc))
> + return dev_err_probe(dev, PTR_ERR(lvds->prstc),
> + "failed to get prst\n");
> +
> + lvds->lvd_rstc = devm_reset_control_get_exclusive(dev, "lvdrst");
> + if (IS_ERR(lvds->lvd_rstc))
> + return dev_err_probe(dev, PTR_ERR(lvds->lvd_rstc),
> + "failed to get core reset\n");
... and these two into a devm_reset_control_bulk_get_exclusive() each.
regards
Philipp
next prev parent reply other threads:[~2026-08-31 9:16 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-26 17:48 [PATCH v3 00/13] Add support for DU, LVDS and DSI on the Renesas RZ/G3L SoC Biju
2026-08-26 17:48 ` [PATCH v3 01/13] drm: renesas: rzg2l_mipi_dsi: Add dphyctrl0_init_val to hw_info Biju
2026-08-26 17:48 ` [PATCH v3 02/13] drm: renesas: rzg2l_mipi_dsi: Add activation_dly " Biju
2026-08-26 17:48 ` [PATCH v3 03/13] drm: renesas: rzg2l_mipi_dsi: Move global timings into hardware info struct Biju
2026-08-27 9:59 ` Tommaso Merciai
2026-08-26 17:48 ` [PATCH v3 04/13] drm: renesas: rzg2l_mipi_dsi: Add support for DSI PWRRDY Biju
2026-08-27 10:28 ` Tommaso Merciai
2026-08-28 7:48 ` Biju Das
2026-08-26 17:48 ` [PATCH v3 05/13] drm: renesas: rzg2l_mipi_dsi: Add RZ/G3L MIPI DSI support Biju
2026-08-27 9:54 ` Tommaso Merciai
2026-08-26 17:48 ` [PATCH v3 06/13] drm: renesas: rz-du: Add RZ/G3L (R9A08G046) DU support Biju
2026-08-27 8:12 ` Tommaso Merciai
2026-08-27 9:33 ` Tommaso Merciai
2026-08-28 7:53 ` Biju Das
2026-08-26 17:48 ` [PATCH v3 07/13] drm: renesas: rz-du: Add support for RZ/G3L LVDS encoder Biju
2026-08-31 9:16 ` Philipp Zabel [this message]
2026-09-29 14:29 ` Biju Das
2026-08-26 17:48 ` [PATCH v3 08/13] arm64: dts: renesas: r9a08g046: Add fcpvd node Biju
2026-08-27 10:35 ` Tommaso Merciai
2026-09-08 13:04 ` Geert Uytterhoeven
2026-08-26 17:48 ` [PATCH v3 09/13] arm64: dts: renesas: r9a08g046: Add vspd node Biju
2026-08-27 10:39 ` Tommaso Merciai
2026-09-08 13:04 ` Geert Uytterhoeven
2026-08-26 17:48 ` [PATCH v3 10/13] arm64: dts: renesas: r9a08g046: Add DU and DSI nodes Biju
2026-08-27 12:58 ` Tommaso Merciai
2026-09-08 13:04 ` Geert Uytterhoeven
2026-08-26 17:48 ` [PATCH v3 11/13] arm64: dts: renesas: r9a08g046: Add LVDS node Biju
2026-08-27 13:32 ` Tommaso Merciai
2026-09-08 13:05 ` Geert Uytterhoeven
2026-08-26 17:48 ` [PATCH v3 12/13] arm64: dts: renesas: Add DSI overlay for RZ/G3L SMARC EVK with ADV7535 Biju
2026-09-08 13:25 ` Geert Uytterhoeven
2026-09-29 17:24 ` Biju Das
2026-08-26 17:48 ` [PATCH v3 13/13] arm64: dts: renesas: Add LVDS overlay for RZ/G3L SMARC EVK with ITE6263 Biju
2026-09-08 13:31 ` Geert Uytterhoeven
2026-09-09 2:57 ` Biju Das
2026-09-09 7:43 ` Geert Uytterhoeven
2026-09-09 8:06 ` Biju Das
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