From: Michael Petlan <mpetlan@redhat.com>
To: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
James Clark <james.clark@linaro.org>,
Sadasivan Shaiju <sadasivan.shaiju2@amd.com>,
x86@kernel.org, linux-perf-users@vger.kernel.org,
linux-kernel@vger.kernel.org,
Manali Shukla <manali.shukla@amd.com>,
Santosh Shukla <santosh.shukla@amd.com>,
Ananth Narayan <ananth.narayan@amd.com>,
Sandipan Das <sandipan.das@amd.com>
Subject: Re: [PATCH v2 4/5] perf/amd/ibs: Avoid calling perf_allow_kernel() from the IBS NMI handler
Date: Fri, 6 Mar 2026 22:13:27 +0100 (CET) [thread overview]
Message-ID: <e0c9b76-29a3-45c0-d2b9-039b9fc5025@redhat.com> (raw)
In-Reply-To: <20260216042216.1440-5-ravi.bangoria@amd.com>
On Mon, 16 Feb 2026, Ravi Bangoria wrote:
> Calling perf_allow_kernel() from the NMI context is unsafe and could be
> fatal. Capture the permission at event-initialization time by storing it
> in event->hw.flags, and have the NMI handler rely on that cached flag
> instead of making the call directly.
>
Hi Ravi.
I have tested this fix on a machine (below), which without this fix can
be easily crashed by recording ibs_op/l3missonly=1/ event.
With this fix, it survived 4900+ iterations without any crash.
CPU details
===========
BIOS CPU family: 107
CPU family: 26
Model: 2
Stepping: 1
Thanks for fixing.
Cheers,
Michael
> Reported-by: Sadasivan Shaiju <sadasivan.shaiju2@amd.com>
> Fixes: 50a53b60e141d ("perf/amd/ibs: Prevent leaking sensitive data to userspace")
> Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Tested-by: Michael Petlan <mpetlan@redhat.com>
> ---
> arch/x86/events/amd/ibs.c | 5 ++++-
> arch/x86/events/perf_event_flags.h | 1 +
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> index 05b7c9f2ec33..004226b52ac7 100644
> --- a/arch/x86/events/amd/ibs.c
> +++ b/arch/x86/events/amd/ibs.c
> @@ -313,6 +313,9 @@ static int perf_ibs_init(struct perf_event *event)
> if (ret)
> return ret;
>
> + if (perf_allow_kernel())
> + hwc->flags |= PERF_X86_EVENT_UNPRIVILEGED;
> +
> if (hwc->sample_period) {
> if (config & perf_ibs->cnt_mask)
> /* raw max_cnt may not be set */
> @@ -1349,7 +1352,7 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
> * unprivileged users.
> */
> if ((event->attr.sample_type & PERF_SAMPLE_RAW) &&
> - perf_allow_kernel()) {
> + (hwc->flags & PERF_X86_EVENT_UNPRIVILEGED)) {
> perf_ibs_phyaddr_clear(perf_ibs, &ibs_data);
> }
>
> diff --git a/arch/x86/events/perf_event_flags.h b/arch/x86/events/perf_event_flags.h
> index 70078334e4a3..47f84ee8f540 100644
> --- a/arch/x86/events/perf_event_flags.h
> +++ b/arch/x86/events/perf_event_flags.h
> @@ -23,3 +23,4 @@ PERF_ARCH(PEBS_LAT_HYBRID, 0x0020000) /* ld and st lat for hybrid */
> PERF_ARCH(NEEDS_BRANCH_STACK, 0x0040000) /* require branch stack setup */
> PERF_ARCH(BRANCH_COUNTERS, 0x0080000) /* logs the counters in the extra space of each branch */
> PERF_ARCH(ACR, 0x0100000) /* Auto counter reload */
> +PERF_ARCH(UNPRIVILEGED, 0x0200000) /* Unprivileged event (wrt perf_allow_kernel()) */
> --
> 2.43.0
>
>
>
next prev parent reply other threads:[~2026-03-06 21:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-16 4:22 [PATCH v2 0/5] perf/amd/ibs: Assorted fixes Ravi Bangoria
2026-02-16 4:22 ` [PATCH v2 1/5] perf/amd/ibs: Account interrupt for discarded samples Ravi Bangoria
2026-02-23 12:25 ` Michael Petlan
2026-02-24 8:11 ` Ravi Bangoria
2026-02-26 13:06 ` Peter Zijlstra
2026-02-28 10:56 ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2026-02-16 4:22 ` [PATCH v2 2/5] perf/amd/ibs: Limit ldlat->l3missonly dependency to Zen5 Ravi Bangoria
2026-02-28 10:56 ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2026-02-16 4:22 ` [PATCH v2 3/5] perf/amd/ibs: Preserve PhyAddrVal bit when clearing PhyAddr MSR Ravi Bangoria
2026-02-28 10:56 ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2026-02-16 4:22 ` [PATCH v2 4/5] perf/amd/ibs: Avoid calling perf_allow_kernel() from the IBS NMI handler Ravi Bangoria
2026-02-28 10:56 ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2026-03-06 21:13 ` Michael Petlan [this message]
2026-03-09 9:07 ` [PATCH v2 4/5] " Michael Petlan
2026-03-09 11:40 ` Ravi Bangoria
2026-03-09 19:06 ` Michael Petlan
2026-03-10 16:46 ` Ravi Bangoria
2026-02-16 4:22 ` [PATCH v2 5/5] perf/amd/ibs: Avoid race between event add and NMI Ravi Bangoria
2026-02-28 10:56 ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2026-02-18 5:51 ` [PATCH v2 0/5] perf/amd/ibs: Assorted fixes Namhyung Kim
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e0c9b76-29a3-45c0-d2b9-039b9fc5025@redhat.com \
--to=mpetlan@redhat.com \
--cc=acme@kernel.org \
--cc=ananth.narayan@amd.com \
--cc=dapeng1.mi@linux.intel.com \
--cc=irogers@google.com \
--cc=james.clark@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=manali.shukla@amd.com \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=ravi.bangoria@amd.com \
--cc=sadasivan.shaiju2@amd.com \
--cc=sandipan.das@amd.com \
--cc=santosh.shukla@amd.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®