[PATCH 0/3] clk: mediatek: mt8183: Simplify with mtk_clk_simple_*()

[PATCH 0/3] clk: mediatek: mt8183: Simplify with mtk_clk_simple_*()

[Chen-Yu Tsai]

As part of clk driver support for MT8192, a pair of "simple"
probe/remove functions was introduced that provided boilerplate
driver functions for clk drivers that fit a simple model: they only
needed to register clock gates. Using them reduces the redundant
boilerplate code needed for each driver. Instead, only a data structure
pointing to the clock gate array and the number of clocks is needed.

This series converts all the MT8183 clock drivers that only contain
clock gates over to these wrapper functions. For instances where the
clk driver not only registers clock gates, the extra action is properly
sequenced with the wrapper functions instead of outright replacing
the probe functions. The converted drivers also get removal support.
This also reduces the overall size by nearly 600 bytes.

Patch 1 converts the MT8183 clk drivers that only do clock gate
registration.

Patch 2 converts the audio clk driver, which also populates sub-devices.

Patch 3 converts the mfgcfg (GPU wrapper) clk driver, which also needs
to enable runtime PM, as it is tied to a power domain.

Please have a look, and merge if possible.

Thanks
ChenYu


Chen-Yu Tsai (3):
  clk: mediatek: mt8183: Convert gate only drivers to mtk_clk_simple_*()
  clk: mediatek: mt8183-audio: Simplify with mtk_clk_simple_*()
  clk: mediatek: mt8183-mfgcfg: Simplify with mtk_clk_simple_*()

 drivers/clk/mediatek/clk-mt8183-audio.c   | 40 +++++++++++++++--------
 drivers/clk/mediatek/clk-mt8183-cam.c     | 21 +++++-------
 drivers/clk/mediatek/clk-mt8183-img.c     | 21 +++++-------
 drivers/clk/mediatek/clk-mt8183-ipu0.c    | 21 +++++-------
 drivers/clk/mediatek/clk-mt8183-ipu1.c    | 21 +++++-------
 drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 21 +++++-------
 drivers/clk/mediatek/clk-mt8183-mfgcfg.c  | 23 +++++++------
 drivers/clk/mediatek/clk-mt8183-vdec.c    | 21 +++++-------
 drivers/clk/mediatek/clk-mt8183-venc.c    | 21 +++++-------
 9 files changed, 95 insertions(+), 115 deletions(-)

-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH 1/3] clk: mediatek: mt8183: Convert gate only drivers to mtk_clk_simple_*()

[Chen-Yu Tsai]

mtk_clk_simple_*() was added after the MT8183 clock drivers were merged.
They provide shared boiler plate for clock providers that only have
clock gates.

Convert many of the MT8183 clock drivers to mtk_clk_simple_*(). This
also adds proper driver removal support for them.

Since the mtk_clk_simple_probe() function allocates the clk_hw pointer
array based on .num_clks given, it effectively requires there are no
holes in the clock ID map. Check that the size of the array matches
the number of clocks with a static assertion.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
---
 drivers/clk/mediatek/clk-mt8183-cam.c     | 21 ++++++++-------------
 drivers/clk/mediatek/clk-mt8183-img.c     | 21 ++++++++-------------
 drivers/clk/mediatek/clk-mt8183-ipu0.c    | 21 ++++++++-------------
 drivers/clk/mediatek/clk-mt8183-ipu1.c    | 21 ++++++++-------------
 drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 21 ++++++++-------------
 drivers/clk/mediatek/clk-mt8183-vdec.c    | 21 ++++++++-------------
 drivers/clk/mediatek/clk-mt8183-venc.c    | 21 ++++++++-------------
 7 files changed, 56 insertions(+), 91 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8183-cam.c b/drivers/clk/mediatek/clk-mt8183-cam.c
index fcc598a45165..00492a451709 100644
--- a/drivers/clk/mediatek/clk-mt8183-cam.c
+++ b/drivers/clk/mediatek/clk-mt8183-cam.c
@@ -34,26 +34,21 @@ static const struct mtk_gate cam_clks[] = {
 	GATE_CAM(CLK_CAM_CCU, "cam_ccu", "cam_sel", 12),
 };
 
-static int clk_mt8183_cam_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(cam_clks) == CLK_CAM_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
-
-	mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc cam_desc = {
+	.clks = cam_clks,
+	.num_clks = ARRAY_SIZE(cam_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_cam[] = {
-	{ .compatible = "mediatek,mt8183-camsys", },
+	{ .compatible = "mediatek,mt8183-camsys", .data = &cam_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_cam_drv = {
-	.probe = clk_mt8183_cam_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-cam",
 		.of_match_table = of_match_clk_mt8183_cam,
diff --git a/drivers/clk/mediatek/clk-mt8183-img.c b/drivers/clk/mediatek/clk-mt8183-img.c
index eb2def2cf0ae..9c9dc71dd398 100644
--- a/drivers/clk/mediatek/clk-mt8183-img.c
+++ b/drivers/clk/mediatek/clk-mt8183-img.c
@@ -34,26 +34,21 @@ static const struct mtk_gate img_clks[] = {
 	GATE_IMG(CLK_IMG_OWE, "img_owe", "img_sel", 9),
 };
 
-static int clk_mt8183_img_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(img_clks) == CLK_IMG_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
-
-	mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc img_desc = {
+	.clks = img_clks,
+	.num_clks = ARRAY_SIZE(img_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_img[] = {
-	{ .compatible = "mediatek,mt8183-imgsys", },
+	{ .compatible = "mediatek,mt8183-imgsys", .data = &img_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_img_drv = {
-	.probe = clk_mt8183_img_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-img",
 		.of_match_table = of_match_clk_mt8183_img,
diff --git a/drivers/clk/mediatek/clk-mt8183-ipu0.c b/drivers/clk/mediatek/clk-mt8183-ipu0.c
index b30fc9f47518..b5ea97ff72fe 100644
--- a/drivers/clk/mediatek/clk-mt8183-ipu0.c
+++ b/drivers/clk/mediatek/clk-mt8183-ipu0.c
@@ -27,26 +27,21 @@ static const struct mtk_gate ipu_core0_clks[] = {
 	GATE_IPU_CORE0(CLK_IPU_CORE0_IPU, "ipu_core0_ipu", "dsp_sel", 2),
 };
 
-static int clk_mt8183_ipu_core0_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(ipu_core0_clks) == CLK_IPU_CORE0_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_IPU_CORE0_NR_CLK);
-
-	mtk_clk_register_gates(node, ipu_core0_clks, ARRAY_SIZE(ipu_core0_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc ipu_core0_desc = {
+	.clks = ipu_core0_clks,
+	.num_clks = ARRAY_SIZE(ipu_core0_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_ipu_core0[] = {
-	{ .compatible = "mediatek,mt8183-ipu_core0", },
+	{ .compatible = "mediatek,mt8183-ipu_core0", .data = &ipu_core0_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_ipu_core0_drv = {
-	.probe = clk_mt8183_ipu_core0_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-ipu_core0",
 		.of_match_table = of_match_clk_mt8183_ipu_core0,
diff --git a/drivers/clk/mediatek/clk-mt8183-ipu1.c b/drivers/clk/mediatek/clk-mt8183-ipu1.c
index b378957e11d0..09f96ed3cf1c 100644
--- a/drivers/clk/mediatek/clk-mt8183-ipu1.c
+++ b/drivers/clk/mediatek/clk-mt8183-ipu1.c
@@ -27,26 +27,21 @@ static const struct mtk_gate ipu_core1_clks[] = {
 	GATE_IPU_CORE1(CLK_IPU_CORE1_IPU, "ipu_core1_ipu", "dsp_sel", 2),
 };
 
-static int clk_mt8183_ipu_core1_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(ipu_core1_clks) == CLK_IPU_CORE1_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_IPU_CORE1_NR_CLK);
-
-	mtk_clk_register_gates(node, ipu_core1_clks, ARRAY_SIZE(ipu_core1_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc ipu_core1_desc = {
+	.clks = ipu_core1_clks,
+	.num_clks = ARRAY_SIZE(ipu_core1_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_ipu_core1[] = {
-	{ .compatible = "mediatek,mt8183-ipu_core1", },
+	{ .compatible = "mediatek,mt8183-ipu_core1", .data = &ipu_core1_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_ipu_core1_drv = {
-	.probe = clk_mt8183_ipu_core1_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-ipu_core1",
 		.of_match_table = of_match_clk_mt8183_ipu_core1,
diff --git a/drivers/clk/mediatek/clk-mt8183-ipu_adl.c b/drivers/clk/mediatek/clk-mt8183-ipu_adl.c
index 941b43ac8bec..3181b0829d80 100644
--- a/drivers/clk/mediatek/clk-mt8183-ipu_adl.c
+++ b/drivers/clk/mediatek/clk-mt8183-ipu_adl.c
@@ -25,26 +25,21 @@ static const struct mtk_gate ipu_adl_clks[] = {
 	GATE_IPU_ADL_I(CLK_IPU_ADL_CABGEN, "ipu_adl_cabgen", "dsp_sel", 24),
 };
 
-static int clk_mt8183_ipu_adl_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(ipu_adl_clks) == CLK_IPU_ADL_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_IPU_ADL_NR_CLK);
-
-	mtk_clk_register_gates(node, ipu_adl_clks, ARRAY_SIZE(ipu_adl_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc ipu_adl_desc = {
+	.clks = ipu_adl_clks,
+	.num_clks = ARRAY_SIZE(ipu_adl_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_ipu_adl[] = {
-	{ .compatible = "mediatek,mt8183-ipu_adl", },
+	{ .compatible = "mediatek,mt8183-ipu_adl", .data = &ipu_adl_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_ipu_adl_drv = {
-	.probe = clk_mt8183_ipu_adl_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-ipu_adl",
 		.of_match_table = of_match_clk_mt8183_ipu_adl,
diff --git a/drivers/clk/mediatek/clk-mt8183-vdec.c b/drivers/clk/mediatek/clk-mt8183-vdec.c
index 0548cde159d0..94dd6ab6b3a0 100644
--- a/drivers/clk/mediatek/clk-mt8183-vdec.c
+++ b/drivers/clk/mediatek/clk-mt8183-vdec.c
@@ -38,26 +38,21 @@ static const struct mtk_gate vdec_clks[] = {
 	GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0),
 };
 
-static int clk_mt8183_vdec_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(vdec_clks) == CLK_VDEC_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
-
-	mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc vdec_desc = {
+	.clks = vdec_clks,
+	.num_clks = ARRAY_SIZE(vdec_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_vdec[] = {
-	{ .compatible = "mediatek,mt8183-vdecsys", },
+	{ .compatible = "mediatek,mt8183-vdecsys", .data = &vdec_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_vdec_drv = {
-	.probe = clk_mt8183_vdec_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-vdec",
 		.of_match_table = of_match_clk_mt8183_vdec,
diff --git a/drivers/clk/mediatek/clk-mt8183-venc.c b/drivers/clk/mediatek/clk-mt8183-venc.c
index f86ec607d87a..33ef3be02727 100644
--- a/drivers/clk/mediatek/clk-mt8183-venc.c
+++ b/drivers/clk/mediatek/clk-mt8183-venc.c
@@ -30,26 +30,21 @@ static const struct mtk_gate venc_clks[] = {
 		"mm_sel", 8),
 };
 
-static int clk_mt8183_venc_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(venc_clks) == CLK_VENC_NR_CLK);
 
-	clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
-
-	mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
-			clk_data);
-
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-}
+static const struct mtk_clk_desc venc_desc = {
+	.clks = venc_clks,
+	.num_clks = ARRAY_SIZE(venc_clks),
+};
 
 static const struct of_device_id of_match_clk_mt8183_venc[] = {
-	{ .compatible = "mediatek,mt8183-vencsys", },
+	{ .compatible = "mediatek,mt8183-vencsys", .data = &venc_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_venc_drv = {
-	.probe = clk_mt8183_venc_probe,
+	.probe = mtk_clk_simple_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-venc",
 		.of_match_table = of_match_clk_mt8183_venc,
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH 2/3] clk: mediatek: mt8183-audio: Simplify with mtk_clk_simple_*()

[Chen-Yu Tsai]

mtk_clk_simple_*() was added after the MT8183 clock drivers were merged.
They provide shared boiler plate for clock providers that only have
clock gates.

Since the driver also populates child nodes, which are for the audio
subsystem, it can't be completely converted to using the functions.

Simplify the MT8183 audio clock driver using mtk_clk_simple_*(),
sequencing the of_platform_{populate,unpopulate} calls manually and
correctly. This also adds proper remove support for the driver.

Since the mtk_clk_simple_probe() function allocates the clk_hw pointer
array based on .num_clks given, it effectively requires there are no
holes in the clock ID map. Check that the size of the array matches
the number of clocks with a static assertion.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
---
 drivers/clk/mediatek/clk-mt8183-audio.c | 40 ++++++++++++++++---------
 1 file changed, 26 insertions(+), 14 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8183-audio.c b/drivers/clk/mediatek/clk-mt8183-audio.c
index b2d7746eddbe..b9255e0a36ae 100644
--- a/drivers/clk/mediatek/clk-mt8183-audio.c
+++ b/drivers/clk/mediatek/clk-mt8183-audio.c
@@ -67,35 +67,47 @@ static const struct mtk_gate audio_clks[] = {
 		20),
 };
 
+static_assert(ARRAY_SIZE(audio_clks) == CLK_AUDIO_NR_CLK);
+
+static const struct mtk_clk_desc audio_desc = {
+	.clks = audio_clks,
+	.num_clks = ARRAY_SIZE(audio_clks),
+};
+
 static int clk_mt8183_audio_probe(struct platform_device *pdev)
 {
-	struct clk_hw_onecell_data *clk_data;
-	int r;
-	struct device_node *node = pdev->dev.of_node;
+	int ret;
 
-	clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
+	ret = mtk_clk_simple_probe(pdev);
+	if (ret)
+		return ret;
 
-	mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
-			clk_data);
+	ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
+	if (ret)
+		goto err_remove_clks;
 
-	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-	if (r)
-		return r;
+	return 0;
 
-	r = devm_of_platform_populate(&pdev->dev);
-	if (r)
-		of_clk_del_provider(node);
+err_remove_clks:
+	mtk_clk_simple_remove(pdev);
+	return ret;
+}
+
+static int clk_mt8183_audio_remove(struct platform_device *pdev)
+{
+	of_platform_depopulate(&pdev->dev);
 
-	return r;
+	return mtk_clk_simple_remove(pdev);
 }
 
 static const struct of_device_id of_match_clk_mt8183_audio[] = {
-	{ .compatible = "mediatek,mt8183-audiosys", },
+	{ .compatible = "mediatek,mt8183-audiosys", .data = &audio_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_audio_drv = {
 	.probe = clk_mt8183_audio_probe,
+	.remove = clk_mt8183_audio_remove,
 	.driver = {
 		.name = "clk-mt8183-audio",
 		.of_match_table = of_match_clk_mt8183_audio,
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH 3/3] clk: mediatek: mt8183-mfgcfg: Simplify with mtk_clk_simple_*()

[Chen-Yu Tsai]

mtk_clk_simple_*() was added after the MT8183 clock drivers were merged.
They provide shared boiler plate for clock providers that only have
clock gates.

Since the MFGCFG block needs its power domain enabled, it can't be
completely converted to using the functions.

Simplify the MT8183 mfgcfg clock driver using mtk_clk_simple_*(),
enabling runtime PM at the same time as before. This also adds proper
driver removal support.

Since the mtk_clk_simple_probe() function allocates the clk_hw pointer
array based on .num_clks given, it effectively requires there are no
holes in the clock ID map. Check that the size of the array matches
the number of clocks with a static assertion.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
---
 drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c
index d774edaf760b..61a3d02e44f5 100644
--- a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c
+++ b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c
@@ -26,28 +26,31 @@ static const struct mtk_gate mfg_clks[] = {
 	GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0)
 };
 
-static int clk_mt8183_mfg_probe(struct platform_device *pdev)
-{
-	struct clk_hw_onecell_data *clk_data;
-	struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(mfg_clks) == CLK_MFG_NR_CLK);
 
-	pm_runtime_enable(&pdev->dev);
+static const struct mtk_clk_desc mfg_desc = {
+	.clks = mfg_clks,
+	.num_clks = ARRAY_SIZE(mfg_clks),
+};
 
-	clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK);
+static int clk_mt8183_mfg_probe(struct platform_device *pdev)
+{
+	int ret = devm_pm_runtime_enable(&pdev->dev);
 
-	mtk_clk_register_gates_with_dev(node, mfg_clks, ARRAY_SIZE(mfg_clks),
-			clk_data, &pdev->dev);
+	if (ret)
+		return ret;
 
-	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+	return mtk_clk_simple_probe(pdev);
 }
 
 static const struct of_device_id of_match_clk_mt8183_mfg[] = {
-	{ .compatible = "mediatek,mt8183-mfgcfg", },
+	{ .compatible = "mediatek,mt8183-mfgcfg", .data = &mfg_desc },
 	{}
 };
 
 static struct platform_driver clk_mt8183_mfg_drv = {
 	.probe = clk_mt8183_mfg_probe,
+	.remove = mtk_clk_simple_remove,
 	.driver = {
 		.name = "clk-mt8183-mfg",
 		.of_match_table = of_match_clk_mt8183_mfg,
-- 
2.37.0.rc0.161.g10f37bed90-goog

Re: [PATCH 0/3] clk: mediatek: mt8183: Simplify with mtk_clk_simple_*()

[AngeloGioacchino Del Regno]

Il 01/07/22 16:51, Chen-Yu Tsai ha scritto:
> As part of clk driver support for MT8192, a pair of "simple"
> probe/remove functions was introduced that provided boilerplate
> driver functions for clk drivers that fit a simple model: they only
> needed to register clock gates. Using them reduces the redundant
> boilerplate code needed for each driver. Instead, only a data structure
> pointing to the clock gate array and the number of clocks is needed.
> 
> This series converts all the MT8183 clock drivers that only contain
> clock gates over to these wrapper functions. For instances where the
> clk driver not only registers clock gates, the extra action is properly
> sequenced with the wrapper functions instead of outright replacing
> the probe functions. The converted drivers also get removal support.
> This also reduces the overall size by nearly 600 bytes.
> 
> Patch 1 converts the MT8183 clk drivers that only do clock gate
> registration.
> 
> Patch 2 converts the audio clk driver, which also populates sub-devices.
> 
> Patch 3 converts the mfgcfg (GPU wrapper) clk driver, which also needs
> to enable runtime PM, as it is tied to a power domain.
> 
> Please have a look, and merge if possible.

Hello Chen-Yu,
great cleanup there!

...I *particularly like* the mfgcfg commit :-) :-)

For the entire series:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>