[PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[Mukesh Ojha]

The Qualcomm PDC (Power Domain Controller) hardware exposes multiple
Direct Resource Voter (DRV) regions, each 0x10000 bytes in size, where
each region serves a specific system client like TZ, HYP, OS etc. Linux
only needs access to the OS DRV region.

Despite this, most platform DTS files described the PDC reg window as
0x30000 bytes three DRV regions which was wider than necessary and
matched the driver's QCOM_PDC_SIZE ioremap clamp introduced as a
workaround for early sm8150 DTs that under-reported the window.

v1 of this series [1] addressed this in two parts: driver cleanup
(tightening the ioremap clamp to 0x10000, refactoring version-specific
interrupt enable paths, etc.) and DT corrections. The driver portion
will be send separately depending on this series. This v2 sends the
remaining DT-only portion.

Patch 1 corrects the binding example, which still showed the old 0x30000
window and would mislead anyone writing a new PDC node.

Patches 2-24 correct the PDC reg size to 0x10000 across 23 platforms:
sdm845, sdm670, sc7180, sc7280, sc8180x, sm8150, sc8280xp, sm8250,
sm8350, sm8450, sm8550, sm8650, sm4450, x1e80100, sm6350, sar2130p,
talos, monaco, lemans, sdx75, milos, qdu1000 and eliza.

The net result is that every PDC node in the tree now describes exactly
one register region of 0x10000 bytes — the OS DRV region that the
driver actually maps.

[1] https://lore.kernel.org/lkml/20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com/

Changes in v2:
  - Dropped driver patches and send them separately so that it can be
    picked by irqchip maintainer.
  - Rebased on linux-next (next-20260518)
  - Dropped the changes which was removing second reg field in pdc.

Mukesh Ojha (24):
  dt-bindings: qcom,pdc: Fix OS DRV reg size in example
  arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: monaco: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000

 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml      | 2 +-
 arch/arm64/boot/dts/qcom/eliza.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/hamoa.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/kodiak.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/lemans.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/milos.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/monaco.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/qdu1000.dtsi                           | 2 +-
 arch/arm64/boot/dts/qcom/sar2130p.dtsi                          | 2 +-
 arch/arm64/boot/dts/qcom/sc7180.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sc8180x.dtsi                           | 2 +-
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi                          | 2 +-
 arch/arm64/boot/dts/qcom/sdm670.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sdx75.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/sm4450.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm6350.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8150.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8250.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8350.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8450.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8550.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8650.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/talos.dtsi                             | 2 +-
 24 files changed, 24 insertions(+), 24 deletions(-)

-- 
2.53.0

[PATCH v2 01/24] dt-bindings: qcom,pdc: Fix OS DRV reg size in example

[Mukesh Ojha]

PDC instances have multiple 0x10000-byte DRV regions, with each region
serving a specific client like HLOS (High level operating system),
TrustZone, Hypervisor etc.,. The OS-visible PDC instance should uses its
own DRV region, while other DRV regions belong to other clients.

Update the binding example to describe a single OS DRV region by
changing the reg size from 0x30000 to 0x10000. This matches the example
with the OS-facing PDC nodes used on Qualcomm platforms and avoids
suggesting that the example should span multiple client regions.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 07a46c5457a4..607b0e74de68 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -99,7 +99,7 @@ examples:
 
     pdc: interrupt-controller@b220000 {
         compatible = "qcom,sdm845-pdc", "qcom,pdc";
-        reg = <0xb220000 0x30000>;
+        reg = <0xb220000 0x10000>;
         qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
         #interrupt-cells = <2>;
         interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 02/24] arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sdm845 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 4ae8627d6dbc..e9a31a5ff04f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -5102,7 +5102,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc_intc: interrupt-controller@b220000 {
 			compatible = "qcom,sdm845-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 03/24] arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sdm670 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 30844b150c80..5c60ea36f04a 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1646,7 +1646,7 @@ usb_1_dwc3: usb@a600000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sdm670-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 40>, <41 521 7>, <49 529 4>,
 					  <54 534 24>, <79 559 15>, <94 609 15>,
 					  <115 630 7>;
-- 
2.53.0

[PATCH v2 04/24] arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc7180 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 8341a7c4a4c6..5d985a48a62a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3510,7 +3510,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc7180-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 05/24] arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc7280 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index c51beada8c7d..33050643e4e6 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -5739,7 +5739,7 @@ opp-810000000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc7280-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,
 					  <55 306 4>, <59 312 3>, <62 374 2>,
 					  <64 434 2>, <66 438 3>, <69 86 1>,
-- 
2.53.0

[PATCH v2 06/24] arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc8180x spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index e87e82fa73e9..a7ea47f07be2 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3554,7 +3554,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc8180x-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 07/24] arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8150 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 0e101096209a..661848ef5eee 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -4174,7 +4174,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8150-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 08/24] arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc8280xp spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index ee02acd18856..9dad61ab5dbf 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -5326,7 +5326,7 @@ dispcc0: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc8280xp-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
 			qcom,pdc-ranges = <0 480 40>,
 					  <40 140 14>,
 					  <54 263 1>,
-- 
2.53.0

[PATCH v2 09/24] arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8250 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 7076720413ab..23aa483e5c43 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -5053,7 +5053,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8250-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>, <126 716 12>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 10/24] arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8350 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index c830953156ec..ca235ce899c9 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3174,7 +3174,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8350-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
 			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,   <55 306 4>,
 					  <59 312 3>, <62 374 2>,  <64 434 2>,   <66 438 3>,
 					  <69 86 1>,  <70 520 54>, <124 609 31>, <155 63 1>,
-- 
2.53.0

[PATCH v2 11/24] arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8450 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index e0c37ce3042a..04b15ee62681 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3728,7 +3728,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8450-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 			qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
 					  <94 609 31>, <125 63 1>, <126 716 12>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 12/24] arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8550 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index b7a7c49db077..7805a6a08a2f 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -4602,7 +4602,7 @@ usb_1_dwc3_ss: endpoint {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8550-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>, <126 716 12>,
 					  <138 251 5>;
-- 
2.53.0

[PATCH v2 13/24] arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8650 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 1604bc8cff37..7a66b79ed336 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5987,7 +5987,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8650-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 
 			interrupt-parent = <&intc>;
 
-- 
2.53.0

[PATCH v2 14/24] arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm4450 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm4450.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
index 696e2e0841ad..b7dc40f3778c 100644
--- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
@@ -464,7 +464,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm4450-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 494 31>,
 					  <125 63 1>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 15/24] arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on x1e80100 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/hamoa.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 4ba751a65142..b5516655db8c 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -6047,7 +6047,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,x1e80100-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 
 			qcom,pdc-ranges = <0 480 42>, <42 251 5>,
 					  <47 522 52>, <99 609 32>,
-- 
2.53.0

[PATCH v2 16/24] arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm6350 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index d6adf68563cb..fe1750303f16 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2557,7 +2557,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm6350-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x17c000f0 0x0 0x64>;
+			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>, <126 655 12>, <138 139 15>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 17/24] arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sar2130p spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sar2130p.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
index d65ad0df6865..c4d48f657e5d 100644
--- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
@@ -2417,7 +2417,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sar2130p-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
+			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 94>,
 					  <94 609 31>,
 					  <125 63 1>,
-- 
2.53.0

[PATCH v2 18/24] arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on talos spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/talos.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index fb1bbc51bb8a..4b6adad72751 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -4624,7 +4624,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qcs615-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 19/24] arm64: dts: qcom: monaco: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on monaco spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 7b1d57460f1e..62903daa9cf2 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -6073,7 +6073,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qcs8300-pdc", "qcom,pdc";
-			reg = <0x0 0xb220000 0x0 0x30000>,
+			reg = <0x0 0xb220000 0x0 0x10000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			interrupt-parent = <&intc>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 20/24] arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on lemans spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index bc7b4f65ad5e..932948362eb3 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5865,7 +5865,7 @@ dispcc0: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 40>,
 					  <40 140 14>,
-- 
2.53.0

[PATCH v2 21/24] arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sdx75 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index d1b61530b562..85cc9c6e6f83 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -1100,7 +1100,7 @@ usb_1_dwc3_ss: endpoint {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sdx75-pdc", "qcom,pdc";
-			reg = <0x0 0xb220000 0x0 0x30000>,
+			reg = <0x0 0xb220000 0x0 0x10000>,
 			      <0x0 0x174000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 147 52>,
 					  <52 266 32>,
-- 
2.53.0

[PATCH v2 22/24] arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on milos spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/milos.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index f09b30ea96ee..4e5cd0f29ec9 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1980,7 +1980,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,milos-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x174000f0 0x0 0x64>;
 			interrupt-parent = <&intc>;
 
-- 
2.53.0

[PATCH v2 23/24] arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on qdu1000 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 952d4270d118..26cc86d12f72 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1054,7 +1054,7 @@ usb_1_dwc3_ss: endpoint {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qdu1000-pdc", "qcom,pdc";
-			reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
+			reg = <0x0 0xb220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
 					  <94 609 31>, <125 63 1>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 24/24] arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on eliza spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x40000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/eliza.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom/eliza.dtsi
index 24c680795481..190728d3e752 100644
--- a/arch/arm64/boot/dts/qcom/eliza.dtsi
+++ b/arch/arm64/boot/dts/qcom/eliza.dtsi
@@ -917,7 +917,7 @@ lpass_lpicx_noc: interconnect@7420000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,eliza-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x40000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x174000f0 0x0 0x64>;
 
 			qcom,pdc-ranges = <0 480 8>, <8 719 1>, <9 718 1>,
-- 
2.53.0

Re: [PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[Konrad Dybcio]

On 5/27/26 11:43 AM, Mukesh Ojha wrote:
> The Qualcomm PDC (Power Domain Controller) hardware exposes multiple
> Direct Resource Voter (DRV) regions, each 0x10000 bytes in size, where
> each region serves a specific system client like TZ, HYP, OS etc. Linux
> only needs access to the OS DRV region.
> 
> Despite this, most platform DTS files described the PDC reg window as
> 0x30000 bytes three DRV regions which was wider than necessary and
> matched the driver's QCOM_PDC_SIZE ioremap clamp introduced as a
> workaround for early sm8150 DTs that under-reported the window.
> 
> v1 of this series [1] addressed this in two parts: driver cleanup
> (tightening the ioremap clamp to 0x10000, refactoring version-specific
> interrupt enable paths, etc.) and DT corrections. The driver portion
> will be send separately depending on this series. This v2 sends the
> remaining DT-only portion.
> 
> Patch 1 corrects the binding example, which still showed the old 0x30000
> window and would mislead anyone writing a new PDC node.
> 
> Patches 2-24 correct the PDC reg size to 0x10000 across 23 platforms:
> sdm845, sdm670, sc7180, sc7280, sc8180x, sm8150, sc8280xp, sm8250,
> sm8350, sm8450, sm8550, sm8650, sm4450, x1e80100, sm6350, sar2130p,
> talos, monaco, lemans, sdx75, milos, qdu1000 and eliza.
> 
> The net result is that every PDC node in the tree now describes exactly
> one register region of 0x10000 bytes — the OS DRV region that the
> driver actually maps.

For the series:

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH v2 01/24] dt-bindings: qcom,pdc: Fix OS DRV reg size in example

[Krzysztof Kozlowski]

On 27/05/2026 11:43, Mukesh Ojha wrote:
> PDC instances have multiple 0x10000-byte DRV regions, with each region
> serving a specific client like HLOS (High level operating system),
> TrustZone, Hypervisor etc.,. The OS-visible PDC instance should uses its
> own DRV region, while other DRV regions belong to other clients.
> 
> Update the binding example to describe a single OS DRV region by
> changing the reg size from 0x30000 to 0x10000. This matches the example
> with the OS-facing PDC nodes used on Qualcomm platforms and avoids
> suggesting that the example should span multiple client regions.
> 
> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
> ---
>  .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml      | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

Re: [PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[Dmitry Baryshkov]

On Wed, May 27, 2026 at 03:13:05PM +0530, Mukesh Ojha wrote:
> The Qualcomm PDC (Power Domain Controller) hardware exposes multiple
> Direct Resource Voter (DRV) regions, each 0x10000 bytes in size, where
> each region serves a specific system client like TZ, HYP, OS etc. Linux
> only needs access to the OS DRV region.
> 
> Despite this, most platform DTS files described the PDC reg window as
> 0x30000 bytes three DRV regions which was wider than necessary and
> matched the driver's QCOM_PDC_SIZE ioremap clamp introduced as a
> workaround for early sm8150 DTs that under-reported the window.
> 
> v1 of this series [1] addressed this in two parts: driver cleanup
> (tightening the ioremap clamp to 0x10000, refactoring version-specific
> interrupt enable paths, etc.) and DT corrections. The driver portion
> will be send separately depending on this series. This v2 sends the
> remaining DT-only portion.
> 
> Patch 1 corrects the binding example, which still showed the old 0x30000
> window and would mislead anyone writing a new PDC node.
> 
> Patches 2-24 correct the PDC reg size to 0x10000 across 23 platforms:
> sdm845, sdm670, sc7180, sc7280, sc8180x, sm8150, sc8280xp, sm8250,
> sm8350, sm8450, sm8550, sm8650, sm4450, x1e80100, sm6350, sar2130p,
> talos, monaco, lemans, sdx75, milos, qdu1000 and eliza.
> 
> The net result is that every PDC node in the tree now describes exactly
> one register region of 0x10000 bytes — the OS DRV region that the
> driver actually maps.
> 
> [1] https://lore.kernel.org/lkml/20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com/
> 

Having the driver change merged,


Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>



-- 
With best wishes
Dmitry

Re: (subset) [PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[Bjorn Andersson]

On Wed, 27 May 2026 15:13:05 +0530, Mukesh Ojha wrote:
> The Qualcomm PDC (Power Domain Controller) hardware exposes multiple
> Direct Resource Voter (DRV) regions, each 0x10000 bytes in size, where
> each region serves a specific system client like TZ, HYP, OS etc. Linux
> only needs access to the OS DRV region.
> 
> Despite this, most platform DTS files described the PDC reg window as
> 0x30000 bytes three DRV regions which was wider than necessary and
> matched the driver's QCOM_PDC_SIZE ioremap clamp introduced as a
> workaround for early sm8150 DTs that under-reported the window.
> 
> [...]

Applied, thanks!

[02/24] arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000
        commit: 054a4ba10d02ee3a03ae71fd0fe4463794df973b
[03/24] arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000
        commit: 5474c37216819283bccef8bfdba998bd4e15f9bf
[04/24] arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000
        commit: fb537f6b472785ac47c93565e746aed219f8aa17
[05/24] arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000
        commit: 82bcc4504f24100b86500843d4ac2e723e940052
[06/24] arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000
        commit: 75a65b596d3aed11c398127bbb241560a9365205
[07/24] arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000
        commit: adf6aaa7afa618016daa64cb76afc8dad06c6e94
[08/24] arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000
        commit: 713ae69ac61195b557633f709d94a8d959b5babd
[09/24] arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000
        commit: f70d152b66cc8730b1a226a38bee90aa0e8ed608
[10/24] arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000
        commit: 39be29e1f8440b532ac8ef8e6f33ae2a7074a0f1
[11/24] arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000
        commit: 987150965d14d86b0b2c865069cfc74275d56220
[12/24] arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000
        commit: 02f185df7dec96031a5139b4273fc21c652fe7e9
[13/24] arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000
        commit: ce4014c270718611b9ad11f8c98c518fafdb1617
[14/24] arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000
        commit: 31cbb1901bd332dbfd7503f20251e604dcd6d4a5
[15/24] arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000
        commit: c39df6b350ef51a9374fbd7c399a56b563be8deb
[16/24] arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000
        commit: 3d8497841d4c831ba313c1ba0b8bbad554edc72f
[17/24] arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000
        commit: 3e7c9c6b4deaf647c46308fdb6d0f71e74c402b1
[18/24] arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000
        commit: 0e89a53d7cc5f0827202137211740f7452d16dc4
[19/24] arm64: dts: qcom: monaco: Reduce OS PDC DRV span to 0x10000
        commit: f69294f2cf6f59693c62e2ef30ceaadbd17c1e6b
[20/24] arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000
        commit: 9693db25077ae8ec29702b55126e13540ca9a09e
[21/24] arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000
        commit: 152ca0d83314f72a0f56d200e604190c47f801ef
[22/24] arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000
        commit: 008bf7c2b6ae7a5ff82089a45830bd73a980dcb4
[23/24] arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000
        commit: b10afe4618f36aff99f3495da44f6a05a2a3dbb2
[24/24] arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000
        commit: 9c10f67778541fef41a35374ac7f5ffe1b928561

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>