From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Brian Masney <bmasney@redhat.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Maxime Ripard <mripard@kernel.org>,
Conor Dooley <conor@kernel.org>,
Dan Carpenter <dan.carpenter@linaro.org>
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/4] clk: microchip: core: allow driver to be compiled with COMPILE_TEST
Date: Sat, 6 Dec 2025 16:28:31 +0200 [thread overview]
Message-ID: <e632211c-7ea5-4b27-8a06-24c160b7e947@tuxon.dev> (raw)
In-Reply-To: <20251205-clk-microchip-fixes-v3-4-a02190705e47@redhat.com>
Hi, Brian,
On 12/5/25 21:46, Brian Masney wrote:
> This driver currently only supports builds against a PIC32 target. To
> avoid future breakage in the future, let's update the Kconfig and the
> driver so that it can be built with CONFIG_COMPILE_TEST enabled.
>
> Note that with the existing asm calls is not how I'd want to do this
> today if this was a new driver, however I don't have access to this
> hardware. To avoid any breakage, let's keep the existing behavior.
>
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> ---
> drivers/clk/microchip/Kconfig | 2 +-
> drivers/clk/microchip/clk-core.c | 32 +++++++++++++++++++++++---------
> 2 files changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
> index 1b9e43eb54976b219a0277cc971f353fd6af226a..1e56a057319d97e20440fe4e107d26fa85c95ab1 100644
> --- a/drivers/clk/microchip/Kconfig
> +++ b/drivers/clk/microchip/Kconfig
> @@ -1,7 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> config COMMON_CLK_PIC32
> - def_bool COMMON_CLK && MACH_PIC32
> + def_bool (COMMON_CLK && MACH_PIC32) || COMPILE_TEST
>
> config MCHP_CLK_MPFS
> bool "Clk driver for PolarFire SoC"
> diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c
> index f467d7bc28c87a50fb18dc527574f973c4b7e615..fad4b45d908310ffb59e4ed57c55ae4266253444 100644
> --- a/drivers/clk/microchip/clk-core.c
> +++ b/drivers/clk/microchip/clk-core.c
> @@ -9,7 +9,15 @@
> #include <linux/interrupt.h>
> #include <linux/io.h>
> #include <linux/iopoll.h>
> +
> +#if !defined(CONFIG_MACH_PIC32) && defined(CONFIG_COMPILE_TEST)
Can't we have something like:
#if defined(CONFIG_MATCH_PIC32)
#include <asm/match-pic32/pic32.h>
#else
#define PIC32_CLR(_reg) ((_reg) + 0x04)
#define PIC32_SET(_reg) ((_reg) + 0x08)
#define PIC32_INV(_reg) ((_reg) + 0x0C)
#define pic32_syskey_unlock()
#endif
> +#define PIC32_CLR(_reg) ((_reg) + 0x04)
> +#define PIC32_SET(_reg) ((_reg) + 0x08)
> +#define PIC32_INV(_reg) ((_reg) + 0x0C)
> +#define pic32_syskey_unlock()
On the other side, there are other drivers using these defines, maybe a
unified approach would fit better? Maybe moving these to
include/linux/platform_data ?
> +#else
> #include <asm/mach-pic32/pic32.h>
> +#endif
>
> #include "clk-core.h"
>
> @@ -74,15 +82,21 @@
> /* SoC specific clock needed during SPLL clock rate switch */
> static struct clk_hw *pic32_sclk_hw;
>
> -/* add instruction pipeline delay while CPU clock is in-transition. */
> -#define cpu_nop5() \
> -do { \
> - __asm__ __volatile__("nop"); \
> - __asm__ __volatile__("nop"); \
> - __asm__ __volatile__("nop"); \
> - __asm__ __volatile__("nop"); \
> - __asm__ __volatile__("nop"); \
> -} while (0)
> +#if !defined(CONFIG_MACH_PIC32) && defined(CONFIG_COMPILE_TEST)
Same here, can't we have:
#ifdef CONFIG_MATCH_PIC32
#define cpu_nop5() \
do { \
__asm__ __volatile__("nop"); \
__asm__ __volatile__("nop"); \
__asm__ __volatile__("nop"); \
__asm__ __volatile__("nop"); \
__asm__ __volatile__("nop"); \
} while (0)
#else
#define cpu_nop5()
#endif
?
> +#define cpu_nop5()
> +#else
> +{
This leads to the following error when compiling:
../drivers/clk/microchip/clk-core.c:88:1: error: expected identifier or ‘(’
before ‘{’ token
88 | {
| ^
Thank you,
Claudiu
> + /* add instruction pipeline delay while CPU clock is in-transition. */
> + #define cpu_nop5() \
> + do { \
> + __asm__ __volatile__("nop"); \
> + __asm__ __volatile__("nop"); \
> + __asm__ __volatile__("nop"); \
> + __asm__ __volatile__("nop"); \
> + __asm__ __volatile__("nop"); \
> + } while (0)
> +}
> +#endif
>
> /* Perpheral bus clocks */
> struct pic32_periph_clk {
>
next prev parent reply other threads:[~2025-12-06 14:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-05 19:46 [PATCH v3 0/4] clk: microchip: core: fix issue with round_rate conversion and allow compile test Brian Masney
2025-12-05 19:46 ` [PATCH v3 1/4] clk: microchip: core: remove duplicate determine_rate on pic32_sclk_ops Brian Masney
2025-12-06 14:30 ` Claudiu Beznea
2025-12-05 19:46 ` [PATCH v3 2/4] clk: microchip: core: correct return value on *_get_parent() Brian Masney
2025-12-06 14:31 ` Claudiu Beznea
2025-12-06 22:38 ` Brian Masney
2025-12-05 19:46 ` [PATCH v3 3/4] clk: microchip: core: remove unused include asm/traps.h Brian Masney
2025-12-05 19:46 ` [PATCH v3 4/4] clk: microchip: core: allow driver to be compiled with COMPILE_TEST Brian Masney
2025-12-06 14:28 ` Claudiu Beznea [this message]
2025-12-19 19:32 ` Brian Masney
2026-01-09 7:13 ` claudiu beznea
2026-01-08 23:15 ` [PATCH v3 0/4] clk: microchip: core: fix issue with round_rate conversion and allow compile test Brian Masney
2026-01-09 7:16 ` claudiu beznea
2026-01-09 11:30 ` Brian Masney
2026-01-09 16:45 ` Brian Masney
2026-01-10 14:59 ` Claudiu Beznea
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