[PATCH v3] arm64: dts: imx8ulp: add caam jr

[PATCH v3] arm64: dts: imx8ulp: add caam jr

[Pankaj Gupta]

Add crypto node in device tree for:
- CAAM job-ring

Signed-off-by: Varun Sethi <v.sethi@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8a6596d5a581..946f2b68d16f 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -252,6 +252,38 @@ pcc3: clock-controller@292d0000 {
 				#reset-cells = <1>;
 			};
 
+			crypto: crypto@292e0000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x292e0000 0x10000>;
+				ranges = <0 0x292e0000 0x10000>;
+
+				sec_jr0: jr@1000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x1000 0x1000>;
+					interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr@2000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x2000 0x1000>;
+					interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr@3000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x3000 0x1000>;
+					interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr3: jr@4000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x4000 0x1000>;
+					interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
+
 			tpm5: tpm@29340000 {
 				compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm";
 				reg = <0x29340000 0x1000>;
-- 
2.34.1

Re: [PATCH v3] arm64: dts: imx8ulp: add caam jr

[Krzysztof Kozlowski]

On 09/04/2024 09:06, Pankaj Gupta wrote:
> Add crypto node in device tree for:
> - CAAM job-ring
> 
> Signed-off-by: Varun Sethi <v.sethi@nxp.com>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>

v3? Where is the changelog? What was happening here?

> ---
>  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 32 ++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index 8a6596d5a581..946f2b68d16f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -252,6 +252,38 @@ pcc3: clock-controller@292d0000 {
>  				#reset-cells = <1>;
>  			};
>  
> +			crypto: crypto@292e0000 {
> +				compatible = "fsl,sec-v4.0";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0x292e0000 0x10000>;
> +				ranges = <0 0x292e0000 0x10000>;

Keep the order as requested in DTS coding style.

Best regards,
Krzysztof

RE: [EXT] Re: [PATCH v3] arm64: dts: imx8ulpx`

[Pankaj Gupta]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Tuesday, April 9, 2024 12:57 PM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
> shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de;
> festevam@gmail.com; dl-linux-imx <linux-imx@nxp.com>; Peng Fan
> <peng.fan@nxp.com>; Jacky Bai <ping.bai@nxp.com>; Bough Chen
> <haibo.chen@nxp.com>; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Cc: Varun Sethi <V.Sethi@nxp.com>
> Subject: [EXT] Re: [PATCH v3] arm64: dts: imx8ulpx`
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 09/04/2024 09:06, Pankaj Gupta wrote:
> > Add crypto node in device tree for:
> > - CAAM job-ring
> >
> > Signed-off-by: Varun Sethi <v.sethi@nxp.com>
> > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> 
> v3? Where is the changelog? What was happening here?
[Accepted] Added in v4.

> 
> > ---
> >  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 32
> ++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > index 8a6596d5a581..946f2b68d16f 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > @@ -252,6 +252,38 @@ pcc3: clock-controller@292d0000 {
> >                               #reset-cells = <1>;
> >                       };
> >
> > +                     crypto: crypto@292e0000 {
> > +                             compatible = "fsl,sec-v4.0";
> > +                             #address-cells = <1>;
> > +                             #size-cells = <1>;
> > +                             reg = <0x292e0000 0x10000>;
> > +                             ranges = <0 0x292e0000 0x10000>;
> 
> Keep the order as requested in DTS coding style.
[Accepted] Corrected in v4.
> 
> Best regards,
> Krzysztof