From: Stafford Horne <shorne@gmail.com>
To: Jonas Bonn <jonas@southpole.se>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: linux@roeck-us.net, openrisc@lists.librecores.org,
linux-kernel@vger.kernel.org, Stafford Horne <shorne@gmail.com>
Subject: [PATCH 20/22] openrisc: entry: Whitespace and comment cleanups
Date: Sun, 15 Jan 2017 08:08:17 +0900 [thread overview]
Message-ID: <e7c2574a256c605b771acafdedb9ec1983bc7639.1484432596.git.shorne@gmail.com> (raw)
In-Reply-To: <cover.1484432596.git.shorne@gmail.com>
In-Reply-To: <cover.1484432596.git.shorne@gmail.com>
Cleanups to whitespace and add some comments. Reading through the delay
slot logic I noticed some things:
- Delay slot instructions were not indented
- Some comments are not lined up
- Use tabs and spaces consistent with other code
No functional change
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
arch/openrisc/kernel/entry.S | 38 ++++++++++++++++++--------------------
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index ba1a361..daae2a4 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -228,7 +228,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
* DTLB miss handler in the CONFIG_GUARD_PROTECTED_CORE part
*/
#ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX
- l.lwz r6,PT_PC(r3) // address of an offending insn
+ l.lwz r6,PT_PC(r3) // address of an offending insn
l.lwz r6,0(r6) // instruction that caused pf
l.srli r6,r6,26 // check opcode for jump insn
@@ -244,49 +244,47 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
l.bf 8f
l.sfeqi r6,0x12 // l.jalr
l.bf 8f
-
- l.nop
+ l.nop
l.j 9f
- l.nop
-8:
+ l.nop
- l.lwz r6,PT_PC(r3) // address of an offending insn
+8: // offending insn is in delay slot
+ l.lwz r6,PT_PC(r3) // address of an offending insn
l.addi r6,r6,4
l.lwz r6,0(r6) // instruction that caused pf
l.srli r6,r6,26 // get opcode
-9:
+9: // offending instruction opcode loaded in r6
#else
- l.mfspr r6,r0,SPR_SR // SR
-// l.lwz r6,PT_SR(r3) // ESR
- l.andi r6,r6,SPR_SR_DSX // check for delay slot exception
- l.sfeqi r6,0x1 // exception happened in delay slot
- l.bnf 7f
- l.lwz r6,PT_PC(r3) // address of an offending insn
+ l.mfspr r6,r0,SPR_SR // SR
+ l.andi r6,r6,SPR_SR_DSX // check for delay slot exception
+ l.sfeqi r6,0x1 // exception happened in delay slot
+ l.bnf 7f
+ l.lwz r6,PT_PC(r3) // address of an offending insn
- l.addi r6,r6,4 // offending insn is in delay slot
+ l.addi r6,r6,4 // offending insn is in delay slot
7:
l.lwz r6,0(r6) // instruction that caused pf
l.srli r6,r6,26 // check opcode for write access
#endif
- l.sfgeui r6,0x33 // check opcode for write access
+ l.sfgeui r6,0x33 // check opcode for write access
l.bnf 1f
l.sfleui r6,0x37
l.bnf 1f
l.ori r6,r0,0x1 // write access
l.j 2f
- l.nop
+ l.nop
1: l.ori r6,r0,0x0 // !write access
2:
/* call fault.c handler in or32/mm/fault.c */
l.jal do_page_fault
- l.nop
+ l.nop
l.j _ret_from_exception
- l.nop
+ l.nop
/* ---[ 0x400: Insn Page Fault exception ]------------------------------- */
EXCEPTION_ENTRY(_itlb_miss_page_fault_handler)
@@ -306,9 +304,9 @@ EXCEPTION_ENTRY(_insn_page_fault_handler)
/* call fault.c handler in or32/mm/fault.c */
l.jal do_page_fault
- l.nop
+ l.nop
l.j _ret_from_exception
- l.nop
+ l.nop
/* ---[ 0x500: Timer exception ]----------------------------------------- */
--
2.9.3
next prev parent reply other threads:[~2017-01-14 23:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-14 23:07 [PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne
2017-01-14 23:07 ` [PATCH 01/22] openrisc: use SPARSE_IRQ Stafford Horne
2017-01-14 23:07 ` [PATCH 02/22] openrisc: add cache way information to cpuinfo Stafford Horne
2017-01-14 23:08 ` [PATCH 03/22] openrisc: tlb miss handler optimizations Stafford Horne
2017-01-14 23:08 ` [PATCH 04/22] openrisc: head: use THREAD_SIZE instead of magic constant Stafford Horne
2017-01-14 23:08 ` [PATCH 05/22] openrisc: head: refactor out tlb flush into it's own function Stafford Horne
2017-01-14 23:08 ` [PATCH 06/22] openrisc: add l.lwa/l.swa emulation Stafford Horne
2017-01-14 23:08 ` [PATCH 07/22] openrisc: add atomic bitops Stafford Horne
2017-01-15 5:42 ` kbuild test robot
2017-01-15 8:29 ` Stafford Horne
2017-01-14 23:08 ` [PATCH 08/22] openrisc: add cmpxchg and xchg implementations Stafford Horne
2017-01-14 23:08 ` [PATCH 09/22] openrisc: add optimized atomic operations Stafford Horne
2017-01-14 23:08 ` [PATCH 10/22] openrisc: add spinlock implementation Stafford Horne
2017-01-14 23:08 ` [PATCH 11/22] openrisc: add futex_atomic_* implementations Stafford Horne
2017-01-14 23:08 ` [PATCH 12/22] openrisc: remove unnecessary stddef.h include Stafford Horne
2017-01-14 23:08 ` [PATCH 13/22] openrisc: Fix the bitmask for the unit present register Stafford Horne
2017-01-14 23:08 ` [PATCH 14/22] openrisc: Initial support for the idle state Stafford Horne
2017-01-14 23:08 ` [PATCH 15/22] openrisc: Add optimized memset Stafford Horne
2017-01-14 23:08 ` [PATCH 16/22] openrisc: Add optimized memcpy routine Stafford Horne
2017-01-14 23:08 ` [PATCH 17/22] openrisc: Add .gitignore Stafford Horne
2017-01-14 23:08 ` [PATCH 18/22] MAINTAINERS: Add the openrisc official repository Stafford Horne
2017-01-14 23:08 ` [PATCH 19/22] scripts/checkstack.pl: Add openrisc support Stafford Horne
2017-01-14 23:08 ` Stafford Horne [this message]
2017-01-14 23:08 ` [PATCH 21/22] openrisc: entry: Fix delay slot detection Stafford Horne
2017-01-14 23:08 ` [PATCH 22/22] openrisc: head: Move init strings to rodata section Stafford Horne
2017-01-15 5:17 ` [PATCH 00/22] Openrisc patchees from backlog for 4.11 Guenter Roeck
2017-01-15 8:36 ` Stafford Horne
2017-01-16 11:58 ` Stafford Horne
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e7c2574a256c605b771acafdedb9ec1983bc7639.1484432596.git.shorne@gmail.com \
--to=shorne@gmail.com \
--cc=jonas@southpole.se \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@roeck-us.net \
--cc=openrisc@lists.librecores.org \
--cc=stefan.kristiansson@saunalahti.fi \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®