From: Stafford Horne <shorne@gmail.com>
To: Jonas Bonn <jonas@southpole.se>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: linux@roeck-us.net, openrisc@lists.librecores.org,
linux-kernel@vger.kernel.org, Stafford Horne <shorne@gmail.com>
Subject: [PATCH 09/22] openrisc: add optimized atomic operations
Date: Sun, 15 Jan 2017 08:08:06 +0900 [thread overview]
Message-ID: <eb53a60d29a8da31f13e09250468f6cd6597f827.1484432596.git.shorne@gmail.com> (raw)
In-Reply-To: <cover.1484432596.git.shorne@gmail.com>
In-Reply-To: <cover.1484432596.git.shorne@gmail.com>
From: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Using the l.lwa and l.swa atomic instruction pair.
Most openrisc processor cores provide these instructions now. If the
instructions are not available emulation is provided.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666]
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
arch/openrisc/include/asm/Kbuild | 1 -
arch/openrisc/include/asm/atomic.h | 53 ++++++++++++++++++++++++++++++++++++++
2 files changed, 53 insertions(+), 1 deletion(-)
create mode 100644 arch/openrisc/include/asm/atomic.h
diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild
index 15e6ed5..1cedd63 100644
--- a/arch/openrisc/include/asm/Kbuild
+++ b/arch/openrisc/include/asm/Kbuild
@@ -1,7 +1,6 @@
header-y += ucontext.h
-generic-y += atomic.h
generic-y += auxvec.h
generic-y += barrier.h
generic-y += bitsperlong.h
diff --git a/arch/openrisc/include/asm/atomic.h b/arch/openrisc/include/asm/atomic.h
new file mode 100644
index 0000000..67f0b30
--- /dev/null
+++ b/arch/openrisc/include/asm/atomic.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __ASM_OPENRISC_ATOMIC_H
+#define __ASM_OPENRISC_ATOMIC_H
+
+#include <linux/types.h>
+
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__(
+ "1: l.lwa %0,0(%1) \n"
+ " l.add %0,%0,%2 \n"
+ " l.swa 0(%1),%0 \n"
+ " l.bnf 1b \n"
+ " l.nop \n"
+ : "=&r"(tmp)
+ : "r"(&v->counter), "r"(i)
+ : "cc", "memory");
+
+ return tmp;
+}
+
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__(
+ "1: l.lwa %0,0(%1) \n"
+ " l.sub %0,%0,%2 \n"
+ " l.swa 0(%1),%0 \n"
+ " l.bnf 1b \n"
+ " l.nop \n"
+ : "=&r"(tmp)
+ : "r"(&v->counter), "r"(i)
+ : "cc", "memory");
+
+ return tmp;
+}
+
+#define atomic_add_return atomic_add_return
+#define atomic_sub_return atomic_sub_return
+
+#include <asm-generic/atomic.h>
+
+#endif /* __ASM_OPENRISC_ATOMIC_H */
--
2.9.3
next prev parent reply other threads:[~2017-01-14 23:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-14 23:07 [PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne
2017-01-14 23:07 ` [PATCH 01/22] openrisc: use SPARSE_IRQ Stafford Horne
2017-01-14 23:07 ` [PATCH 02/22] openrisc: add cache way information to cpuinfo Stafford Horne
2017-01-14 23:08 ` [PATCH 03/22] openrisc: tlb miss handler optimizations Stafford Horne
2017-01-14 23:08 ` [PATCH 04/22] openrisc: head: use THREAD_SIZE instead of magic constant Stafford Horne
2017-01-14 23:08 ` [PATCH 05/22] openrisc: head: refactor out tlb flush into it's own function Stafford Horne
2017-01-14 23:08 ` [PATCH 06/22] openrisc: add l.lwa/l.swa emulation Stafford Horne
2017-01-14 23:08 ` [PATCH 07/22] openrisc: add atomic bitops Stafford Horne
2017-01-15 5:42 ` kbuild test robot
2017-01-15 8:29 ` Stafford Horne
2017-01-14 23:08 ` [PATCH 08/22] openrisc: add cmpxchg and xchg implementations Stafford Horne
2017-01-14 23:08 ` Stafford Horne [this message]
2017-01-14 23:08 ` [PATCH 10/22] openrisc: add spinlock implementation Stafford Horne
2017-01-14 23:08 ` [PATCH 11/22] openrisc: add futex_atomic_* implementations Stafford Horne
2017-01-14 23:08 ` [PATCH 12/22] openrisc: remove unnecessary stddef.h include Stafford Horne
2017-01-14 23:08 ` [PATCH 13/22] openrisc: Fix the bitmask for the unit present register Stafford Horne
2017-01-14 23:08 ` [PATCH 14/22] openrisc: Initial support for the idle state Stafford Horne
2017-01-14 23:08 ` [PATCH 15/22] openrisc: Add optimized memset Stafford Horne
2017-01-14 23:08 ` [PATCH 16/22] openrisc: Add optimized memcpy routine Stafford Horne
2017-01-14 23:08 ` [PATCH 17/22] openrisc: Add .gitignore Stafford Horne
2017-01-14 23:08 ` [PATCH 18/22] MAINTAINERS: Add the openrisc official repository Stafford Horne
2017-01-14 23:08 ` [PATCH 19/22] scripts/checkstack.pl: Add openrisc support Stafford Horne
2017-01-14 23:08 ` [PATCH 20/22] openrisc: entry: Whitespace and comment cleanups Stafford Horne
2017-01-14 23:08 ` [PATCH 21/22] openrisc: entry: Fix delay slot detection Stafford Horne
2017-01-14 23:08 ` [PATCH 22/22] openrisc: head: Move init strings to rodata section Stafford Horne
2017-01-15 5:17 ` [PATCH 00/22] Openrisc patchees from backlog for 4.11 Guenter Roeck
2017-01-15 8:36 ` Stafford Horne
2017-01-16 11:58 ` Stafford Horne
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