From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
To: linusw@kernel.org, andrew@lunn.ch, olteanv@gmail.com,
kuba@kernel.org, davem@davemloft.net, edumazet@google.com,
pabeni@redhat.com, linux@armlinux.org.uk, luizluca@gmail.com,
maxime.chevallier@bootlin.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH net-next v3 0/9] net: dsa: realtek: rtl8365mb: add support for RTL8367S-VB
Date: Sat, 10 Oct 2026 21:36:45 +0200 [thread overview]
Message-ID: <e84d76ee-03df-49b0-8c9a-b289dfae8728@yahoo.com> (raw)
In-Reply-To: <e84d76ee-03df-49b0-8c9a-b289dfae8728.ref@yahoo.com>
This series adds support for the RTL8367S-VB (chip ID 0x6642) to the
rtl8365mb driver. The chip belongs to a new "family D" that differs from
the existing family C in its VLAN table layout, speed/RGMII configuration
and SerDes (SDS13) handling.
Patch 1 documents the chip in the devicetree binding.
Patch 2 adds the chip family infrastructure (no functional change).
Patches 3-4 add port speed and RGMII mode configuration for family D.
Patches 5-6 add VLAN 4k table access and raw-VID PVID handling.
Patches 7-8 add SDS13 PCS support and re-latching of the SerDes.
Patch 9 adds the RTL8367S-VB chip table entry. It comes last, so that
no intermediate commit exposes a family D chip with incomplete
handling and the series stays bisectable.
Family C's functional behaviour is unchanged. The only change in a
shared path is a mutex serializing SerDes register access, added in
patch 8. The port count is capped at 8 for family D only (patch 9).
Tested on TP-Link Archer AX55 v1 (RTL8367S-VB, CPU port over HSGMII to ipq5018)
with bridge VLAN filtering and per-port PVIDs.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
---
v3:
- add a dt-bindings patch (1/9): RTL8367S-VB listed under
realtek,rtl8365mb
- add chip family infrastructure as its own patch (2/9), no
functional change
- squash the family D PVID getter and the PVID set/clear patches
into one (6/9), so the read and write paths use the same register
layout at every point of the series
- add the RTL8367S-VB chip table entry last (9/9), after the family
D speed, RGMII, VLAN and PCS support, so no intermediate commit
can reach the chip with incomplete handling (reported by the
automated review)
- 6/9: fix the commit message (port p's write lands in port p >> 1)
and update the stale kernel-doc and file comments
- 8/9: start the re-latch work only for 2500base-x, cancel it from
.pcs_disable, from pcs_config() and via a devres action; retry the
SDS_MISC restore and come back soon if it fails; rewrite the
commit message to match the code (reported by the automated
review)
- 9/9: document family D in the file header comment and in the
learn limit comment (limit confirmed against the Realtek vendor
API)
v2: https://lore.kernel.org/netdev/28382f3f-03c1-4606-9b11-86f118abeafe@yahoo.com/
- 2/8: mask r_speed to the width of the FORCE_SPEED field before passing
it to FIELD_PREP(), so that the family D 2500M value (5) cannot trip
the compile-time range check; bit 2 still goes to FORCE_SPEED2
(reported by the automated review).
- 4/8: the commit message now explains why EXT_TXC_DLY[5:3] is cleared
for RGMII on EXT1: the vendor RGMII setup does it, and the init jam
table leaves the field at 2, which would add an extra TX delay on top
of tx-internal-delay-ps. Add a comment describing the EXT_TXC_DLY
layout (Andrew Lunn's review).
- 8/8: document the new struct rtl8365mb members in the kernel-doc
comment (sds_lock, sds_relatch, sds_relatch_count,
sds_misc_target_val), which fixes the kernel-doc warnings.
- 1/8, 3/8, 5/8, 6/8, 7/8: no changes.
v1: https://lore.kernel.org/netdev/84fc7483-b22d-45ea-a3b8-3285dc357265@yahoo.com/
Mieczyslaw Nalewaj (9):
dt-bindings: net: dsa: realtek: add RTL8367S-VB
net: dsa: realtek: rtl8365mb: add chip family infrastructure
net: dsa: realtek: rtl8365mb: set speed for family D
net: dsa: realtek: rtl8365mb: set RGMII mode for family D
net: dsa: realtek: rtl8365mb: set and get vlan 4k for family D
net: dsa: realtek: rtl8365mb: use raw VID for PVID on family D
net: dsa: realtek: rtl8365mb: add family D SDS13 PCS support
net: dsa: realtek: rtl8365mb: re-latch the family D SerDes
net: dsa: realtek: rtl8365mb: add support for RTL8367S-VB
.../devicetree/bindings/net/dsa/realtek.yaml | 2 +-
drivers/net/dsa/realtek/rtl8365mb.h | 14 +
drivers/net/dsa/realtek/rtl8365mb_main.c | 603 ++++++++++++++++--
drivers/net/dsa/realtek/rtl8365mb_vlan.c | 342 ++++++++--
4 files changed, 844 insertions(+), 117 deletions(-)
create mode 100644 drivers/net/dsa/realtek/rtl8365mb.h
--
2.53.0
next parent reply other threads:[~2026-10-10 19:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <e84d76ee-03df-49b0-8c9a-b289dfae8728.ref@yahoo.com>
2026-10-10 19:36 ` Mieczyslaw Nalewaj [this message]
2026-10-10 19:38 ` [PATCH net-next v3 1/9] dt-bindings: net: dsa: realtek: add RTL8367S-VB Mieczyslaw Nalewaj
2026-10-10 19:39 ` [PATCH net-next v3 2/9] net: dsa: realtek: rtl8365mb: add chip family infrastructure Mieczyslaw Nalewaj
2026-10-10 19:39 ` [PATCH net-next v3 3/9] net: dsa: realtek: rtl8365mb: set speed for family D Mieczyslaw Nalewaj
2026-10-10 19:40 ` [PATCH net-next v3 4/9] net: dsa: realtek: rtl8365mb: set RGMII mode " Mieczyslaw Nalewaj
2026-10-10 19:41 ` [PATCH net-next v3 5/9] net: dsa: realtek: rtl8365mb: set and get vlan 4k " Mieczyslaw Nalewaj
2026-10-10 19:42 ` [PATCH net-next v3 6/9] net: dsa: realtek: rtl8365mb: use raw VID for PVID on " Mieczyslaw Nalewaj
2026-10-10 19:43 ` [PATCH net-next v3 7/9] net: dsa: realtek: rtl8365mb: add family D SDS13 PCS support Mieczyslaw Nalewaj
2026-10-10 19:44 ` [PATCH net-next v3 8/9] net: dsa: realtek: rtl8365mb: re-latch the family D SerDes Mieczyslaw Nalewaj
2026-10-10 19:44 ` [PATCH net-next v3 9/9] net: dsa: realtek: rtl8365mb: add support for RTL8367S-VB Mieczyslaw Nalewaj
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