mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Chen, Zide" <zide.chen@intel.com>
To: Yosry Ahmed <yosry@kernel.org>
Cc: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	kvm@vger.kernel.org, Jim Mattson <jmattson@google.com>,
	Andi Kleen <ak@linux.intel.com>,
	Stephane Eranian <eranian@google.com>,
	linux-kernel@vger.kernel.org, Mingwei Zhang <mizhang@google.com>,
	Das Sandipan <Sandipan.Das@amd.com>,
	Shukla Manali <Manali.Shukla@amd.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>,
	Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH v3 04/18] KVM: x86/pmu: Add PMC bitmap accessor helpers
Date: Mon, 9 Nov 2026 11:55:39 -0600	[thread overview]
Message-ID: <e977b107-7762-46d3-ba31-832eb9ae609c@intel.com> (raw)
In-Reply-To: <CAO9r8zMs+aBPN-w7L3nZxwVV-Dr2f0tBYBjicDsdYVp_Mc2AWg@mail.gmail.com>



On 11/6/2026 4:35 PM, Yosry Ahmed wrote:
> On Fri, Nov 6, 2026 at 2:19 PM Chen, Zide <zide.chen@intel.com> wrote:
>>
>>
>>
>> On 11/6/2026 1:09 PM, Yosry Ahmed wrote:
>>>> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>>>> index b8875ed5502c..4f192429ed93 100644
>>>> --- a/arch/x86/include/asm/kvm_host.h
>>>> +++ b/arch/x86/include/asm/kvm_host.h
>>>> @@ -595,7 +595,10 @@ struct kvm_pmu {
>>>>              DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
>>>>              atomic64_t __reprogram_pmi;
>>>>      };
>>>> -    DECLARE_BITMAP(pmc_exists, X86_PMC_IDX_MAX);
>>>> +    union {
>>>> +            DECLARE_BITMAP(pmc_exists, X86_PMC_IDX_MAX);
>>>> +            u64 pmc_exists64;
>>>
>>> __pmc_exists would be more consistent with __reprogam_pmi above.
>>
>> I used the *64 suffix and without '__' to match the cntr_mask/cntr_mask64
>> and fixed_cntr_mask/fixed_cntr_mask64 pattern in struct x86_pmu_capability
>> (patch 7), whereas __reprogram_pmi used '__' because it is an atomic64_t
>> rather than a scalar mask.
> 
> I don't follow why the '__' prefix is specific to atomics, but anyway,
> I will leave this up to you and Sean.
> 
>>
>> Also, arch/x86/events/perf_event.h has similar names:
>>
>>         union {
>>                         u64             cntr_mask64;
>>                         unsigned long
>> cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
>>         };
>>         union {
>>                         u64             fixed_cntr_mask64;
>>                         unsigned long
>> fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
>>         };
>>
>> Seems either way won't be absolutely unifie
>>
>>>> @@ -120,6 +144,17 @@ static inline struct kvm_pmc *kvm_pmc_idx_to_pmc(struct kvm_pmu *pmu, int idx)
>>>>                      continue;                               \
>>>>              else                                            \
>>>>
>>>> +/*
>>>> + * @mask is expected to be a scalar unsigned long derived from pmu->pmc_exists,
>>>> + * which is already constrained by KVM_MAX_NR_{AMD,INTEL}_{GP,FIXED}_COUNTERS,
>>>> + * so iteration up to KVM's maximum counter count is safe.
>>>> + */
>>>> +#define kvm_for_each_gp_counter(i, mask)    \
>>>> +    for_each_set_bit((i), &(mask), KVM_MAX_NR_GP_COUNTERS)
>>>> +
>>>> +#define kvm_for_each_fixed_counter(i, mask) \
>>>> +    for_each_set_bit((i), &(mask), KVM_MAX_NR_FIXED_COUNTERS)
>>>
>>> These are not used in this patch, are they?
>>>
>>> They should probably be introduced when they are used. Also, do we
>>> always end up passing kvm_gp_pmc_mask() and kvm_fixed_pmc_mask()? If
>>> yes, maybe we should pass in the pmu here instead?
>>
>> The intent was to group all bitmap accessor helpers together in this
>> patch for easier review so that the big patch 5/18 could be kept to
>> mostly mechanical replacements.
>>
>> But if you prefer introducing them on first use, I'll move their
>> definitions to patch 5.
> 
> Yeah I think it's clearer to see what their definitions are with their usage.

OK, then I can move these two macros to the next patch.
>>
>> Regarding passing 'pmu' directly, I initially implemented it in this
>> way, but I can't recall why I discarded it. I will take another look.
> 
> Thanks.

How about these? With them, we can remove the {gp,fixed}_mask variables
that you pointed out in your review of 5/18. The APIs are more
complicated, but the caller code is much cleaner.

static inline unsigned int __kvm_find_next_counter(struct kvm_pmu *pmu,
                                             unsigned int base,
                                             unsigned int max,
                                             unsigned int prev)
{
        return find_next_bit(pmu->pmc_exists, base + max, base + prev) -
base;
}

#define __kvm_for_each_counter(i, pmu, base, max)                       \
        for ((i) = __kvm_find_next_counter((pmu), (base), (max), 0);
     \
             (i) < (max);                                               \
             (i) = __kvm_find_next_counter((pmu), (base), (max), (i) + 1))

/*
 * Iterate over all general-purpose or fixed counters supported by @pmu.
 */
#define kvm_for_each_gp_counter(i, pmu) \
        __kvm_for_each_counter(i, pmu, 0, KVM_MAX_NR_GP_COUNTERS)

#define kvm_for_each_fixed_counter(i, pmu) \
        __kvm_for_each_counter(i, pmu, KVM_FIXED_PMC_BASE_IDX,
KVM_MAX_NR_FIXED_COUNTERS)

  parent reply	other threads:[~2026-11-09 17:55 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-06  1:39 [PATCH v3 00/18] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Zide Chen
2026-11-06  1:39 ` [PATCH v3 01/18] KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions Zide Chen
2026-11-06 18:19   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 02/18] KVM: x86/pmu: Rename all_valid_pmc_idx to pmc_exists Zide Chen
2026-11-06 18:21   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 03/18] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu Zide Chen
2026-11-06 18:37   ` Yosry Ahmed
2026-11-06 21:16     ` Chen, Zide
2026-11-06 22:38       ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 04/18] KVM: x86/pmu: Add PMC bitmap accessor helpers Zide Chen
2026-11-06 19:09   ` Yosry Ahmed
2026-11-06 22:19     ` Chen, Zide
2026-11-06 22:35       ` Yosry Ahmed
2026-11-09  7:53         ` Mi, Dapeng
2026-11-09 17:56           ` Chen, Zide
2026-11-09 17:55         ` Chen, Zide [this message]
2026-11-09 18:07           ` Yosry Ahmed
2026-11-09 18:59             ` Chen, Zide
2026-11-06  1:39 ` [PATCH v3 05/18] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu Zide Chen
2026-11-06 19:34   ` Yosry Ahmed
2026-11-07  0:42     ` Jim Mattson
2026-11-07  2:26       ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 06/18] KVM: x86/pmu: Expose kvm_host_pmu to vendor modules Zide Chen
2026-11-06 19:37   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 07/18] perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap Zide Chen
2026-11-06  1:39 ` [PATCH v3 08/18] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities Zide Chen
2026-11-06 20:05   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 09/18] perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability Zide Chen
2026-11-06  1:39 ` [PATCH v3 10/18] KVM: x86/pmu: Document GLOBAL_STATUS_RESET passthrough erratum Zide Chen
2026-11-06 20:14   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 11/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_STATUS_SET MSR Zide Chen
2026-11-06 20:35   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 12/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_INUSE MSR Zide Chen
2026-11-06  1:39 ` [PATCH v3 13/18] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap Zide Chen
2026-11-06 21:00   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 14/18] KVM: x86/pmu: Factor out fixed counter control bit calculation Zide Chen
2026-11-06  1:39 ` [PATCH v3 15/18] KVM: x86/pmu: Mask only OS/USR bits when filtering fixed counters Zide Chen
2026-11-06 21:19   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 16/18] KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is set Zide Chen
2026-11-06  1:39 ` [PATCH v3 17/18] KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts Zide Chen
2026-11-06 21:20   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 18/18] KVM: selftests: Support fixed counters bitmap in pmu_counters_test Zide Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e977b107-7762-46d3-ba31-832eb9ae609c@intel.com \
    --to=zide.chen@intel.com \
    --cc=Manali.Shukla@amd.com \
    --cc=Sandipan.Das@amd.com \
    --cc=ak@linux.intel.com \
    --cc=dapeng1.mi@linux.intel.com \
    --cc=eranian@google.com \
    --cc=jmattson@google.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mizhang@google.com \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=seanjc@google.com \
    --cc=xudong.hao@intel.com \
    --cc=yosry@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®