From: Louis Chauvet <louis.chauvet@bootlin.com>
To: Swamil Jain <s-jain1@ti.com>, devarsh <devarsht@ti.com>,
Jyri Sarha <jyri.sarha@iki.fi>,
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sam Ravnborg <sam@ravnborg.org>, Benoit Parrot <bparrot@ti.com>,
Lee Jones <lee@kernel.org>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>
Cc: thomas.petazzoni@bootlin.com, Jyri Sarha <jsarha@ti.com>,
Tomi Valkeinen <tomi.valkeinen@ti.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org
Subject: Re: [PATCH 4/4] drm/tidss: Fix sampling edge configuration
Date: Mon, 11 Aug 2025 11:56:57 +0200 [thread overview]
Message-ID: <e9df67f0-8fce-4fbf-8fff-c499c4a2efaf@bootlin.com> (raw)
In-Reply-To: <f15779ad-788a-4dc6-b5a6-4187b9a9c986@ti.com>
Le 08/08/2025 à 18:26, Swamil Jain a écrit :
>
>
> On 8/8/25 19:16, devarsh wrote:
>> Hi Louis,
>>
>> Thanks for the patch.
>>
>> On 30/07/25 22:32, Louis Chauvet wrote:
>>> As stated in the AM62x Technical Reference Manual (SPRUIV7B), the data
>>> sampling edge needs to be configured in two distinct registers: one in the
>>> TIDSS IP and another in the memory-mapped control register modules.
>>
>> I don't think AM62x is thee only one which requires this and on the
>> contrary not all SoCs require this extra setting. We had been waiting on
>> confirmations from hardware team and very recently they gave a list of
>> SoCs which require this, as per that I think we need to limit this to
>> AM62x and AM62A per current supported SoCs.
>>
>> Swamil,
>> Please confirm on this and share if any additional details required here.
>>
>
> Yeah Devarsh, as you mentioned, this is valid for AM62X, AM62A and
> AM62P. We would have upstreamed this feature, but there are some
> corrections in Technical Reference Manual for these SoCs regarding
> programming CTRL_MMR_DPI_CLK_CTRL register fields, we are in loop with
> H/W team, waiting for their official confirmation regarding this issue.
>
> Thanks Louis for working on this patch, but we should wait for H/W
> team's confirmation.
Hello all,
Thanks for the feedback. I was not aware of this current work.
Do you plan to send the fix yourself? Should I wait your HW team
feedback and send a v2?
I also have a very similar patch ready for u-boot (depending on the same
DT modifications), do you plan to fix u-boot too?
Thanks,
Louis Chauvet
> Regards,
> Swamil.
>
>> Regards
>> Devarsh
>>
>> Since
>>> the latter is not within the same address range, a phandle to a syscon
>>> device is used to access the regmap.
>>>
>>> Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platform Display SubSystem")
>>> Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com>
>>>
>>> ---
>>>
>>> Cc: stable@vger.kernel.org
>>> ---
>>> drivers/gpu/drm/tidss/tidss_dispc.c | 14 ++++++++++++++
>>> 1 file changed, 14 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
>>> index c0277fa36425ee1f966dccecf2b69a2d01794899..65ca7629a2e75437023bf58f8a1bddc24db5e3da 100644
>>> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
>>> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
>>> @@ -498,6 +498,7 @@ struct dispc_device {
>>> const struct dispc_features *feat;
>>>
>>> struct clk *fclk;
>>> + struct regmap *clk_ctrl;
>>>
>>> bool is_enabled;
>>>
>>> @@ -1267,6 +1268,11 @@ void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport,
>>> FLD_VAL(mode->vdisplay - 1, 27, 16));
>>>
>>> VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 0, 0);
>>> +
>>> + if (dispc->clk_ctrl) {
>>> + regmap_update_bits(dispc->clk_ctrl, 0, 0x100, ipc ? 0x100 : 0x000);
>>> + regmap_update_bits(dispc->clk_ctrl, 0, 0x200, rf ? 0x200 : 0x000);
>>> + }
>>> }
>>>
>>> void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport)
>>> @@ -3012,6 +3018,14 @@ int dispc_init(struct tidss_device *tidss)
>>>
>>> dispc_init_errata(dispc);
>>>
>>> + dispc->clk_ctrl = syscon_regmap_lookup_by_phandle_optional(tidss->dev->of_node,
>>> + "ti,clk-ctrl");
>>> + if (IS_ERR(dispc->clk_ctrl)) {
>>> + r = dev_err_probe(dispc->dev, PTR_ERR(dispc->clk_ctrl),
>>> + "DISPC: syscon_regmap_lookup_by_phandle failed.\n");
>>> + return r;
>>> + }
>>> +
>>> dispc->fourccs = devm_kcalloc(dev, ARRAY_SIZE(dispc_color_formats),
>>> sizeof(*dispc->fourccs), GFP_KERNEL);
>>> if (!dispc->fourccs)
>>>
>>
--
Louis Chauvet, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2025-08-11 9:57 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-30 17:02 [PATCH 0/4] drm/tidss: Fixes data edge sampling Louis Chauvet
2025-07-30 17:02 ` [PATCH 1/4] dt-bindings: display: ti,am65x-dss: Add clk property for data edge synchronization Louis Chauvet
2025-07-30 23:56 ` Rob Herring
2025-07-31 9:50 ` Louis Chauvet
2025-07-30 17:02 ` [PATCH 2/4] dt-bindings: mfd: syscon: Add ti,am625-dss-clk-ctrl Louis Chauvet
2025-08-04 8:04 ` Krzysztof Kozlowski
2025-07-30 17:02 ` [PATCH 3/4] arm64: dts: ti: k3-am62-main: Add tidss clk-ctrl property Louis Chauvet
2025-07-31 0:17 ` Rob Herring
2025-07-31 9:50 ` Louis Chauvet
2025-08-05 6:44 ` Krzysztof Kozlowski
2025-08-11 9:56 ` Louis Chauvet
2025-07-30 17:02 ` [PATCH 4/4] drm/tidss: Fix sampling edge configuration Louis Chauvet
2025-08-04 8:06 ` Krzysztof Kozlowski
2025-08-08 13:46 ` devarsh
2025-08-08 16:26 ` Swamil Jain
2025-08-11 9:56 ` Louis Chauvet [this message]
2025-08-12 18:02 ` Swamil Jain
2025-08-12 18:10 ` Swamil Jain
2026-07-02 10:48 ` Leonardo Costa
2025-08-07 13:21 ` [PATCH 0/4] drm/tidss: Fixes data edge sampling Tomi Valkeinen
2025-08-08 13:24 ` devarsh
2025-08-11 7:56 ` Tomi Valkeinen
2025-08-11 9:56 ` Louis Chauvet
2025-10-10 7:42 ` Swamil Jain
2025-10-27 17:53 ` Swamil Jain
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