From: Shawn Lin <shawn.lin@rock-chips.com>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: shawn.lin@rock-chips.com, linux-pci@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
mayank.rana@oss.qualcomm.com, quic_vbadigan@quicinc.com,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>
Subject: Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Date: Mon, 30 Mar 2026 16:35:53 +0800 [thread overview]
Message-ID: <e9e8495e-6674-1d8a-a55f-618967c9dbf8@rock-chips.com> (raw)
In-Reply-To: <6e843004-62ec-46e2-a7c7-5e0ad18d4954@oss.qualcomm.com>
在 2026/03/30 星期一 16:16, Krishna Chaitanya Chundru 写道:
>
>
> On 3/13/2026 8:19 AM, Shawn Lin wrote:
>> 在 2026/03/11 星期三 20:40, Krishna Chaitanya Chundru 写道:
>>> Some platforms have incorrect T_POWER_ON value programmed in hardware.
>>> Generally these will be corrected by bootloaders, but not all targets
>>> support bootloaders to program correct values due to that
>>> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
>>> can result in improper L1.2 exit behavior and if AER happens to be
>>> supported and enabled, the error may be *reported* via AER.
>>>
>>> Parse "t-power-on-us" property from each root port node and program them
>>> as part of host initialization using dw_pcie_program_t_power_on() before
>>> link training.
>>>
>>> This property in added to the dtschema here[1].
>>>
>>> Signed-off-by: Krishna Chaitanya Chundru
>>> <krishna.chundru@oss.qualcomm.com>
>>> Link[1]:
>>> https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
>>>
>>> ---
>>> drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
>>> 1 file changed, 13 insertions(+)
>>>
>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c
>>> b/drivers/pci/controller/dwc/pcie-qcom.c
>>> index
>>> 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32
>>> 100644
>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>>> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>>> struct qcom_pcie_port {
>>> struct list_head list;
>>> struct phy *phy;
>>> + u32 l1ss_t_power_on;
>>
>> u16?
>>
>>> struct list_head perst;
>>> };
>>> @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct
>>> qcom_pcie *pcie)
>>> return 0;
>>> }
>>> +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
>>> +{
>>> + struct qcom_pcie_port *port;
>>> +
>>> + list_for_each_entry(port, &pcie->ports, list)
>>> + dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
>>> +}
>>> +
>>> static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>> {
>>> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>>> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct
>>> dw_pcie_rp *pp)
>>> dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>>> dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>>> + qcom_pcie_configure_ports(pcie);
>>> +
>>> qcom_pcie_perst_deassert(pcie);
>>> if (pcie->cfg->ops->config_sid) {
>>> @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct
>>> qcom_pcie *pcie, struct device_node *node
>>> if (ret)
>>> return ret;
>>> + of_property_read_u32(node, "t-power-on-us",
>>> &port->l1ss_t_power_on);
>>
>> Ditto?
> the property has -us and doesn't have $ref to indicate if it is u32 or
> u16, by default it is u32 property only.
> can we can't keep it as u16 even if have always less than u16.
It came from dw_pcie_program_t_power_on(u16 t_power_on) which
take u16, so the value will be truncated anyway. Well, it's up to you,
just a bypass comment. :)
>
> - Krishna Chaitanya.
>>> +
>>> port->phy = phy;
>>> INIT_LIST_HEAD(&port->list);
>>> list_add_tail(&port->list, &pcie->ports);
>>>
>
>
next prev parent reply other threads:[~2026-03-30 8:36 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 12:40 [PATCH v3 0/3] PCI: qcom: Program T_POWER_ON value for L1.2 exit timing Krishna Chaitanya Chundru
2026-03-11 12:40 ` [PATCH v3 1/3] PCI/ASPM: Add helper to encode L1SS T_POWER_ON fields Krishna Chaitanya Chundru
2026-03-13 2:45 ` Shawn Lin
2026-03-16 4:51 ` Manivannan Sadhasivam
2026-03-16 5:06 ` Krishna Chaitanya Chundru
2026-03-11 12:40 ` [PATCH v3 2/3] PCI: dwc: Add helper to Program T_POWER_ON Krishna Chaitanya Chundru
2026-03-13 2:45 ` Shawn Lin
2026-03-11 12:40 ` [PATCH v3 3/3] PCI: qcom: " Krishna Chaitanya Chundru
2026-03-13 2:49 ` Shawn Lin
2026-03-30 8:16 ` Krishna Chaitanya Chundru
2026-03-30 8:35 ` Shawn Lin [this message]
2026-03-16 4:53 ` Manivannan Sadhasivam
2026-03-16 5:05 ` Krishna Chaitanya Chundru
2026-03-16 5:28 ` Manivannan Sadhasivam
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