From: Aaron Sierra <asierra@xes-inc.com>
To: "Agócs Pál" <agocs.pal.86@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Samuel Ortiz <sameo@linux.intel.com>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH] lpc_ich: fix gpio base and control offsets
Date: Tue, 15 Jan 2013 14:34:06 -0600 (CST) [thread overview]
Message-ID: <eaf72173-bdb9-4839-a8cb-1e80c535aa1e@zimbra> (raw)
In-Reply-To: <20130115212904.6c8e96ad@palee-debian>
> > #define ACPIBASE_GCS_END 0x3414
> >
> > #define GPIOBASE 0x48
> > +#define GPIOBASE_ICH5 0x58
> > #define GPIOCTRL 0x4C
> > +#define GPIOCTRL_ICH5 0x58
> >
> > #define RCBABASE 0xf0
>
> Aaron,
> A like this corrected patch and a little fix that GPIOCTRL_ICH5 is
> 0x5C
> Is this correct? Thanks!
Yes, of course you're still right about the register offset. Sorry for merging poorly.
-Aaron
prev parent reply other threads:[~2013-01-15 20:34 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <fe420c78-bf1b-40f0-b3f0-09ea26986de2@zimbra>
2013-01-15 19:12 ` Aaron Sierra
2013-01-15 20:13 ` Aaron Sierra
2013-01-15 20:29 ` Agócs Pál
2013-01-15 20:34 ` Aaron Sierra [this message]
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