mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: "Mario Limonciello" <mario.limonciello@amd.com>,
	"Bjorn Helgaas" <helgaas@kernel.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>
Cc: Oz Tiram <oz@shift-computing.de>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v5 1/3] PCI: Cache bridge firmware secondary bus number
Date: Wed, 11 Nov 2026 18:48:00 +0530	[thread overview]
Message-ID: <eba45235-a6b1-4a48-9c56-9e069c299478@amd.com> (raw)
In-Reply-To: <20261110-vfct-regression-v5-1-f49fae981bf3@amd.com>



On 11-Nov-26 4:18 AM, Mario Limonciello wrote:
> Bridge scans are split into two passes when bus numbers need reassigning.
> Save the firmware secondary bus number on the bridge pci_dev during pass 0,
> before the bridge is disabled, and keep it for pass 1 so devices discovered
> there can read the original bus number via their upstream bridge.
> 
> Guard the cached value with a validity flag so later rescans do not overwrite
> it with the renumbered runtime value.
> 
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   drivers/pci/probe.c | 4 ++++
>   include/linux/pci.h | 3 +++
>   2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 27008e2ea5afc..14b3dd7dac271 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -1418,6 +1418,10 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
>   
>   	pci_dbg(dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n",
>   		secondary, subordinate, pass);
> +	if (!pass && !dev->fw_sec_busnr_valid) {
> +		dev->fw_sec_busnr = secondary;
> +		dev->fw_sec_busnr_valid = true;
> +	}

I think the original suggestion from Bjorn was to save it inside 
pci_read_bridge_windows() which happens before the two pass scan. In 
that case, it doesn't need the extra flag or checks.

Thanks,
Lijo

>   
>   	if (!primary && (primary != bus->number) && secondary && subordinate) {
>   		pci_warn(dev, "Primary bus is hard wired to 0\n");
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 5ffcf5ce8c966..b942dbb4edf57 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -363,6 +363,8 @@ struct pci_dev {
>   	struct pci_slot	*slot;		/* Physical slot this device is in */
>   
>   	unsigned int	devfn;		/* Encoded device & function index */
> +	/* Firmware secondary bus number saved across bridge scan passes */
> +	unsigned char	fw_sec_busnr;
>   	unsigned short	vendor;
>   	unsigned short	device;
>   	unsigned short	subsystem_vendor;
> @@ -414,6 +416,7 @@ struct pci_dev {
>   	unsigned int	pme_poll:1;	/* Poll device's PME status bit */
>   	unsigned int	pinned:1;	/* Whether this dev is pinned */
>   	unsigned int	config_rrs_sv:1; /* Config RRS software visibility */
> +	unsigned int	fw_sec_busnr_valid:1;
>   	unsigned int	imm_ready:1;	/* Supports Immediate Readiness */
>   	unsigned int	d1_support:1;	/* Low power state D1 is supported */
>   	unsigned int	d2_support:1;	/* Low power state D2 is supported */
> 


  reply	other threads:[~2026-11-11 13:18 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10 22:48 [PATCH v5 0/3] Fix amdgpu detection of pci=realloc Mario Limonciello
2026-11-10 22:48 ` [PATCH v5 1/3] PCI: Cache bridge firmware secondary bus number Mario Limonciello
2026-11-11 13:18   ` Lazar, Lijo [this message]
2026-11-10 22:48 ` [PATCH v5 2/3] drm/amdgpu: Match VFCT using initial PCI " Mario Limonciello
2026-11-10 22:48 ` [PATCH v5 3/3] drm/radeon: " Mario Limonciello

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=eba45235-a6b1-4a48-9c56-9e069c299478@amd.com \
    --to=lijo.lazar@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=christian.koenig@amd.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=helgaas@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=mario.limonciello@amd.com \
    --cc=oz@shift-computing.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®