[PATCH 0/3] ARM: soc: ti: k3: Provide reset cause information

[PATCH 0/3] ARM: soc: ti: k3: Provide reset cause information

[A. Sverdlin]

From: Alexander Sverdlin <alexander.sverdlin@siemens.com>

Newer TI SoCs from K3 family (AM64x and newer) provide a detailed reset
cause information in RST_SRC register in the reset module within memory
mapped control registers. To make this information available in user space:

- provide the DT bindings for the reset module
- add the rest module to the device trees of the corresponding SoCs
- conditionally add custom SYSFS attribute group (if particular SoC
  supports it) with "reset_reason" attribute providing the textual
  form of the reset cause as documented in AM62x Processors Technical
  Reference Manual.

The location for the newly provided information was inspired by
drivers/soc/tegra/pmc.c.

The series has been tested on AM623 (relevant DT is k3-am62-wakeup.dtsi).
Interestingly, K3 can have multiple bits asserted, for instance in case of
WDT-triggered reset:

$ cat /sys/bus/soc/devices/soc0/reset_reason
Reset Caused by MCU ESM Error
Reset Caused by Main ESM Error

Alexander Sverdlin (3):
  dt-bindings: soc/reset: ti: add binding for k3 platforms reset module
  arm64: dts: ti: k3-*: Add am64x and newer reset module
  soc: ti: k3-socinfo: Provide reset reason information

 .../bindings/reset/ti,am64-rst.yaml           | 39 ++++++++
 .../soc/ti/ti,j721e-system-controller.yaml    | 11 +++
 arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi    |  5 ++
 arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi   |  5 ++
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi      |  5 ++
 drivers/soc/ti/k3-socinfo.c                   | 88 +++++++++++++++++++
 6 files changed, 153 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/ti,am64-rst.yaml

-- 
2.52.0

[PATCH 1/3] dt-bindings: soc/reset: ti: add binding for k3 platforms reset module

[A. Sverdlin]

From: Alexander Sverdlin <alexander.sverdlin@siemens.com>

Add DT binding for Texas Instruments K3 Multicore SoC platforms reset
module present on AM64x and newer members of the K3 family and consists of
the RST_CTRL, RST_STAT, RST_SRC and RST_MAGIC_WORD registers.

The planned usage is to provide reset reason information.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
---
 .../bindings/reset/ti,am64-rst.yaml           | 39 +++++++++++++++++++
 .../soc/ti/ti,j721e-system-controller.yaml    | 11 ++++++
 2 files changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/ti,am64-rst.yaml

diff --git a/Documentation/devicetree/bindings/reset/ti,am64-rst.yaml b/Documentation/devicetree/bindings/reset/ti,am64-rst.yaml
new file mode 100644
index 0000000000000..5a17cee9c6528
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/ti,am64-rst.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/ti,am64-rst.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 Multicore SoC platforms reset module
+
+maintainers:
+  - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+description: |
+  Texas Instruments (ARM64) K3 Multicore SoC platforms reset module is present
+  on AM64x and newer members of the K3 family and consists of the RST_CTRL,
+  RST_STAT, RST_SRC and RST_MAGIC_WORD registers.
+
+properties:
+  $nodename:
+    pattern: "^rst@[0-9a-f]+$"
+
+  compatible:
+    items:
+      - const: ti,am64-rst
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    rst@43018170 {
+        compatible = "ti,am64-rst";
+        reg = <0x43018170 0x10>;
+    };
diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
index f3bd0be3b279f..a2071a1668f96 100644
--- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
+++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
@@ -86,6 +86,12 @@ patternProperties:
     description:
       This is the DSS OLDI CTRL region.
 
+  "^rst@[0-9a-f]+$":
+    type: object
+    $ref: /schemas/reset/ti,am64-rst.yaml#
+    description:
+      The node corresponding to SoC reset module.
+
 required:
   - compatible
   - reg
@@ -133,5 +139,10 @@ examples:
             compatible = "ti,j784s4-pcie-ctrl", "syscon";
             reg = <0x4070 0x4>;
         };
+
+        rst@18170 {
+            compatible = "ti,am64-rst";
+            reg = <0x18170 0x10>;
+        };
     };
 ...
-- 
2.52.0

Re: [PATCH 1/3] dt-bindings: soc/reset: ti: add binding for k3 platforms reset module

[Philipp Zabel]

On Mo, 2026-03-09 at 11:07 +0100, A. Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> 
> Add DT binding for Texas Instruments K3 Multicore SoC platforms reset
> module present on AM64x and newer members of the K3 family and consists of
> the RST_CTRL, RST_STAT, RST_SRC and RST_MAGIC_WORD registers.
> 
> The planned usage is to provide reset reason information.
> 
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> ---
>  .../bindings/reset/ti,am64-rst.yaml           | 39 +++++++++++++++++++

I think this might belong in .../bindings/power/reset instead.
Or maybe .../bindings/soc/(ti/)?

Like 'device', the term 'reset' is a bit overloaded.

The existing binding docs in .../bindings/reset/ describe peripheral
reset controllers that provide reset signals to other hardware blocks.
See Documentation/devicetree/bindings/reset/reset.txt.

Since your bindings don't contain #reset-cells, I assume the RST_CTRL
register does not contain direct control of reset signals that need to
be operated during runtime.

System reset (restart/poweroff) machinery related bindings are found in
.../bindings/power/reset.

regards
Philipp

Re: [PATCH 1/3] dt-bindings: soc/reset: ti: add binding for k3 platforms reset module

[Krzysztof Kozlowski]

On 09/03/2026 11:07, A. Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> 
> Add DT binding for Texas Instruments K3 Multicore SoC platforms reset
> module present on AM64x and newer members of the K3 family and consists of
> the RST_CTRL, RST_STAT, RST_SRC and RST_MAGIC_WORD registers.
> 
> The planned usage is to provide reset reason information.
> 
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> ---
>  .../bindings/reset/ti,am64-rst.yaml           | 39 +++++++++++++++++++
>  .../soc/ti/ti,j721e-system-controller.yaml    | 11 ++++++
>  2 files changed, 50 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/ti,am64-rst.yaml
> 
> diff --git a/Documentation/devicetree/bindings/reset/ti,am64-rst.yaml b/Documentation/devicetree/bindings/reset/ti,am64-rst.yaml
> new file mode 100644
> index 0000000000000..5a17cee9c6528
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/ti,am64-rst.yaml
> @@ -0,0 +1,39 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/ti,am64-rst.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 Multicore SoC platforms reset module
> +
> +maintainers:
> +  - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> +
> +description: |

Do not need '|' unless you need to preserve formatting.

> +  Texas Instruments (ARM64) K3 Multicore SoC platforms reset module is present
> +  on AM64x and newer members of the K3 family and consists of the RST_CTRL,
> +  RST_STAT, RST_SRC and RST_MAGIC_WORD registers.
> +
> +properties:
> +  $nodename:
> +    pattern: "^rst@[0-9a-f]+$"

Drop. Neither correct, nor needed.

> +
> +  compatible:
> +    items:

Drop items

> +      - const: ti,am64-rst
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    rst@43018170 {
> +        compatible = "ti,am64-rst";
> +        reg = <0x43018170 0x10>;

This looks like just 4 registers, so part of syscon....

> +    };
> diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> index f3bd0be3b279f..a2071a1668f96 100644
> --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> @@ -86,6 +86,12 @@ patternProperties:
>      description:
>        This is the DSS OLDI CTRL region.
>  
> +  "^rst@[0-9a-f]+$":
> +    type: object
> +    $ref: /schemas/reset/ti,am64-rst.yaml#

And here is a proof. No, individual registers are not separate devices.

Not a separate device = no device node.


Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: soc/reset: ti: add binding for k3 platforms reset module

[Sverdlin, Alexander]

Hi Krzysztof,

On Mon, 2026-03-09 at 11:51 +0100, Krzysztof Kozlowski wrote:
> > +      - const: ti,am64-rst
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    rst@43018170 {
> > +        compatible = "ti,am64-rst";
> > +        reg = <0x43018170 0x10>;
> 
> This looks like just 4 registers, so part of syscon....

it is... I've copied ti,am654-chipid actually...

> > +    };
> > diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> > index f3bd0be3b279f..a2071a1668f96 100644
> > --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> > +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> > @@ -86,6 +86,12 @@ patternProperties:
> >       description:
> >         This is the DSS OLDI CTRL region.
> >   
> > +  "^rst@[0-9a-f]+$":
> > +    type: object
> > +    $ref: /schemas/reset/ti,am64-rst.yaml#
> 
> And here is a proof. No, individual registers are not separate devices.
> 
> Not a separate device = no device node.

I see! Thanks for the quick review! Seems that I've picked the only counter-example,
all the rest from the same syscon block, like "ti,am62-opp-efuse-table", lives
in mfd/syscon.yaml...

-- 
Alexander Sverdlin
Siemens AG
www.siemens.com

[PATCH 2/3] arm64: dts: ti: k3-*: Add am64x and newer reset module

[A. Sverdlin]

From: Alexander Sverdlin <alexander.sverdlin@siemens.com>

Add the reset module present on AM64x and newer SoCs carrying reset cause
information.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
---
 arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi  | 5 +++++
 arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 5 +++++
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi    | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index 75aed3a88284d..954130e8f37ba 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -41,6 +41,11 @@ usb1_phy_ctrl: syscon@4018 {
 			compatible = "ti,am62-usb-phy-ctrl", "syscon";
 			reg = <0x4018 0x4>;
 		};
+
+		rst@18170 {
+			compatible = "ti,am64-rst";
+			reg = <0x18170 0x10>;
+		};
 	};
 
 	target-module@2b300050 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 23877dadc98dc..7c94e6e16c069 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -39,6 +39,11 @@ usb1_phy_ctrl: syscon@4018 {
 			compatible = "ti,am62-usb-phy-ctrl", "syscon";
 			reg = <0x4018 0x4>;
 		};
+
+		rst@18170 {
+			compatible = "ti,am64-rst";
+			reg = <0x18170 0x10>;
+		};
 	};
 
 	target-module@2b300050 {
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 1b1d3970888b8..acbc7243cb16a 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -74,6 +74,11 @@ epwm_tbclk: clock-controller@4130 {
 			reg = <0x4130 0x4>;
 			#clock-cells = <1>;
 		};
+
+		rst@18170 {
+			compatible = "ti,am64-rst";
+			reg = <0x18170 0x10>;
+		};
 	};
 
 	gic500: interrupt-controller@1800000 {
-- 
2.52.0

[PATCH 3/3] soc: ti: k3-socinfo: Provide reset reason information

[A. Sverdlin]

From: Alexander Sverdlin <alexander.sverdlin@siemens.com>

Add reset_reason attribute decoging the RST_SRC register present in AM64x
and later SoCs of K3 family. Textual representation of the bits was taken
from the AM62x Processors Technical Reference Manual, except the POR, which
is not signalled explicitly by the reset module.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
---
 drivers/soc/ti/k3-socinfo.c | 88 +++++++++++++++++++++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/drivers/soc/ti/k3-socinfo.c b/drivers/soc/ti/k3-socinfo.c
index 676041879eca3..3736c982fd0c8 100644
--- a/drivers/soc/ti/k3-socinfo.c
+++ b/drivers/soc/ti/k3-socinfo.c
@@ -45,6 +45,8 @@
 #define JTAG_ID_PARTNO_J722S		0xBBA0
 #define JTAG_ID_PARTNO_AM62LX		0xBBA7
 
+#define CTRL_MMR_RST_SRC		8
+
 static const struct k3_soc_id {
 	unsigned int id;
 	const char *family_name;
@@ -123,6 +125,90 @@ static const struct regmap_config k3_chipinfo_regmap_cfg = {
 	.reg_stride = 4,
 };
 
+static u32 k3_reset_source;
+static const char *const k3_reset_sources[] = {
+	[0]	= "Reset Caused by MCU Reset Pin",
+	[1]	= "Power On Reset",			/* Reserved in HW */
+	[2]	= "Main Reset Pin",
+	[4]	= "Thermal Reset",
+	[8]	= "Debug Subsystem Initiated Reset",
+	[12]	= "SMS Cold Reset",
+	[13]	= "SMS Warm Reset",
+	[16]	= "Software Warm Reset",
+	[20]	= "Software Main Warm Reset From MCU CTRL MMR",
+	[21]	= "Software Main Warm Reset from MAIN CTRL MMR",
+	[22]	= "Watchdog Initiated Reset",
+	[24]	= "Software Main Power On Reset From MCU CTRL MMR",
+	[25]	= "Software Main Power On Reset From MAIN CTRL MMR",
+	[30]	= "Reset Caused by Main ESM Error",
+	[31]	= "Reset Caused by MCU ESM Error",
+};
+
+static ssize_t reset_reason_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	int ret, i;
+	int total = 0;
+
+	for (i = ARRAY_SIZE(k3_reset_sources); i >= 0; i--) {
+		if (!k3_reset_sources[i] || !(k3_reset_source & BIT(i)))
+			continue;
+
+		ret = sprintf(buf + total, "%s\n", k3_reset_sources[i]);
+		if (ret < 0)
+			return ret;
+		total += ret;
+		/* Note that several reset sources may be active simultaneously */
+	}
+
+	return total;
+}
+
+static DEVICE_ATTR_RO(reset_reason);
+
+static struct attribute *k3_soc_attrs[] = {
+	&dev_attr_reset_reason.attr,
+	NULL
+};
+
+ATTRIBUTE_GROUPS(k3_soc);
+
+static const struct of_device_id k3_rst_id_table[] = {
+	{
+		.compatible	= "ti,am64-rst",
+	},
+	{}
+};
+
+static void k3_reset_reason_read(struct soc_device_attribute *soc_dev_attr)
+{
+	struct device_node *node = of_find_matching_node(NULL, k3_rst_id_table);
+	struct regmap *regmap;
+
+	/* AM65x/J721E do not have similar registers */
+	if (!node)
+		return;
+
+	regmap = device_node_to_regmap(node);
+	of_node_put(node);
+	if (IS_ERR(regmap)) {
+		pr_err("Cannot obtain %s regmap\n", k3_rst_id_table[0].compatible);
+		return;
+	}
+
+	regmap_read(regmap, CTRL_MMR_RST_SRC, &k3_reset_source);
+	/*
+	 * The register is only being cleared on POR, so we have to clear reset
+	 * source of the current boot manually
+	 */
+	regmap_write(regmap, CTRL_MMR_RST_SRC, k3_reset_source);
+
+	/* Simplify the code a bit and use HW-reserved bit for POR indication */
+	if (!k3_reset_source)
+		k3_reset_source |= BIT(1);
+
+	soc_dev_attr->custom_attr_group = k3_soc_groups[0];
+}
+
 static int k3_chipinfo_probe(struct platform_device *pdev)
 {
 	struct device_node *node = pdev->dev.of_node;
@@ -183,6 +269,8 @@ static int k3_chipinfo_probe(struct platform_device *pdev)
 	of_property_read_string(node, "model", &soc_dev_attr->machine);
 	of_node_put(node);
 
+	k3_reset_reason_read(soc_dev_attr);
+
 	soc_dev = soc_device_register(soc_dev_attr);
 	if (IS_ERR(soc_dev)) {
 		ret = PTR_ERR(soc_dev);
-- 
2.52.0