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* [PATCH 0/2] Add Altera timeout bridge driver
@ 2026-10-03 20:19 Vyacheslav Yurkov via B4 Relay
  2026-10-03 20:19 ` [PATCH 1/2] dt-bindings: bus: Add binding for Altera AXI Timeout Bridge Vyacheslav Yurkov via B4 Relay
  2026-10-03 20:19 ` [PATCH 2/2] bus: add Altera timeout bridge driver Vyacheslav Yurkov via B4 Relay
  0 siblings, 2 replies; 5+ messages in thread
From: Vyacheslav Yurkov via B4 Relay @ 2026-10-03 20:19 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: devicetree, linux-kernel, Vyacheslav Yurkov, Vyacheslav Yurkov

This series adds support for the Altera timeout bridge IP. 

The timeout bridge connects an Avalon bus to the HPS and provides a
downstream address space for devices implemented in the FPGA. The
bridge also exposes status information and generates an interrupt when
a timeout occurs.

The driver registers the timeout bridge as a bus and allows child
devices behind the bridge to be described as the child nodes in the
device tree.

The latest bridge documentation (as of October 2026):
https://docs.altera.com/r/docs/683609/26.1/quartus-prime-pro-edition-user-guide/axi-timeout-bridge-ip

Signed-off-by: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
---
Vyacheslav Yurkov (2):
      dt-bindings: bus: Add binding for Altera AXI Timeout Bridge
      bus: add Altera timeout bridge driver

 .../bindings/bus/altera-timeout-bridge.yaml        |  82 ++++++++
 drivers/bus/Kconfig                                |  10 +
 drivers/bus/Makefile                               |   1 +
 drivers/bus/altera-timeout-bridge.c                | 219 +++++++++++++++++++++
 4 files changed, 312 insertions(+)
---
base-commit: a74306e2e676f9775457366fc047a660fbf02f26
change-id: 20261003-feature-timeout-ip-7a93630de299

Best regards,
-- 
Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>



^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2026-10-03 21:24 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-10-03 20:19 [PATCH 0/2] Add Altera timeout bridge driver Vyacheslav Yurkov via B4 Relay
2026-10-03 20:19 ` [PATCH 1/2] dt-bindings: bus: Add binding for Altera AXI Timeout Bridge Vyacheslav Yurkov via B4 Relay
2026-10-03 21:18   ` Krzysztof Kozlowski
2026-10-03 20:19 ` [PATCH 2/2] bus: add Altera timeout bridge driver Vyacheslav Yurkov via B4 Relay
2026-10-03 21:24   ` Krzysztof Kozlowski

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