mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
* [PATCH] drm/msm/adreno: Assign revn to A635
@ 2023-06-28 19:05 Konrad Dybcio
  2023-06-28 19:54 ` Dmitry Baryshkov
  0 siblings, 1 reply; 3+ messages in thread
From: Konrad Dybcio @ 2023-06-28 19:05 UTC (permalink / raw)
  To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
	David Airlie, Daniel Vetter
  Cc: Marijn Suijten, linux-arm-msm, dri-devel, freedreno,
	linux-kernel, Konrad Dybcio

Recently, a WARN_ON() was introduced to ensure that revn is filled before
adreno_is_aXYZ is called. This however doesn't work very well when revn is
0 by design (such as for A635). Fill it in as a stopgap solution for
-fixes.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index cb94cfd137a8..8ea7eae9fc52 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -345,6 +345,7 @@ static const struct adreno_info gpulist[] = {
 		.address_space_size = SZ_16G,
 	}, {
 		.rev = ADRENO_REV(6, 3, 5, ANY_ID),
+		.revn = 635,
 		.fw = {
 			[ADRENO_FW_SQE] = "a660_sqe.fw",
 			[ADRENO_FW_GMU] = "a660_gmu.bin",

---
base-commit: 5c875096d59010cee4e00da1f9c7bdb07a025dc2
change-id: 20230628-topic-a635-1b3c2c987417

Best regards,
-- 
Konrad Dybcio <konrad.dybcio@linaro.org>


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/msm/adreno: Assign revn to A635
  2023-06-28 19:05 [PATCH] drm/msm/adreno: Assign revn to A635 Konrad Dybcio
@ 2023-06-28 19:54 ` Dmitry Baryshkov
  2023-06-30 20:41   ` Rob Clark
  0 siblings, 1 reply; 3+ messages in thread
From: Dmitry Baryshkov @ 2023-06-28 19:54 UTC (permalink / raw)
  To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Sean Paul, David Airlie,
	Daniel Vetter
  Cc: Marijn Suijten, linux-arm-msm, dri-devel, freedreno, linux-kernel

On 28/06/2023 22:05, Konrad Dybcio wrote:
> Recently, a WARN_ON() was introduced to ensure that revn is filled before
> adreno_is_aXYZ is called. This however doesn't work very well when revn is
> 0 by design (such as for A635). Fill it in as a stopgap solution for
> -fixes.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

I'd have probably added:

Fixes: cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified 
before being set")

or

Fixes: 192f4ee3e408 ("drm/msm/a6xx: Add support for Adreno 7c Gen 3 gpu")


> ---
>   drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
> index cb94cfd137a8..8ea7eae9fc52 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
> +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
> @@ -345,6 +345,7 @@ static const struct adreno_info gpulist[] = {
>   		.address_space_size = SZ_16G,
>   	}, {
>   		.rev = ADRENO_REV(6, 3, 5, ANY_ID),
> +		.revn = 635,
>   		.fw = {
>   			[ADRENO_FW_SQE] = "a660_sqe.fw",
>   			[ADRENO_FW_GMU] = "a660_gmu.bin",
> 
> ---
> base-commit: 5c875096d59010cee4e00da1f9c7bdb07a025dc2
> change-id: 20230628-topic-a635-1b3c2c987417
> 
> Best regards,

-- 
With best wishes
Dmitry


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/msm/adreno: Assign revn to A635
  2023-06-28 19:54 ` Dmitry Baryshkov
@ 2023-06-30 20:41   ` Rob Clark
  0 siblings, 0 replies; 3+ messages in thread
From: Rob Clark @ 2023-06-30 20:41 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Konrad Dybcio, Abhinav Kumar, Sean Paul, David Airlie,
	Daniel Vetter, Marijn Suijten, linux-arm-msm, dri-devel,
	freedreno, linux-kernel

On Wed, Jun 28, 2023 at 12:54 PM Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> On 28/06/2023 22:05, Konrad Dybcio wrote:
> > Recently, a WARN_ON() was introduced to ensure that revn is filled before
> > adreno_is_aXYZ is called. This however doesn't work very well when revn is
> > 0 by design (such as for A635). Fill it in as a stopgap solution for
> > -fixes.
> >
> > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> I'd have probably added:
>
> Fixes: cc943f43ece7 ("drm/msm/adreno: warn if chip revn is verified
> before being set")
>
> or
>
> Fixes: 192f4ee3e408 ("drm/msm/a6xx: Add support for Adreno 7c Gen 3 gpu")

I'd lean towards the former, given that this is a temporary workaround
until we do a more comprehensive overhaul and remove revn entirely

BR,
-R

>
>
> > ---
> >   drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
> > index cb94cfd137a8..8ea7eae9fc52 100644
> > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
> > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
> > @@ -345,6 +345,7 @@ static const struct adreno_info gpulist[] = {
> >               .address_space_size = SZ_16G,
> >       }, {
> >               .rev = ADRENO_REV(6, 3, 5, ANY_ID),
> > +             .revn = 635,
> >               .fw = {
> >                       [ADRENO_FW_SQE] = "a660_sqe.fw",
> >                       [ADRENO_FW_GMU] = "a660_gmu.bin",
> >
> > ---
> > base-commit: 5c875096d59010cee4e00da1f9c7bdb07a025dc2
> > change-id: 20230628-topic-a635-1b3c2c987417
> >
> > Best regards,
>
> --
> With best wishes
> Dmitry
>

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-06-30 20:42 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-28 19:05 [PATCH] drm/msm/adreno: Assign revn to A635 Konrad Dybcio
2023-06-28 19:54 ` Dmitry Baryshkov
2023-06-30 20:41   ` Rob Clark

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®