From: Christian Loehle <christian.loehle@arm.com>
To: Sumit Gupta <sumitg@nvidia.com>,
rafael@kernel.org, viresh.kumar@linaro.org,
zhanjie9@hisilicon.com, zhenglifeng1@huawei.com, benc@redhat.com,
linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: treding@nvidia.com, jonathanh@nvidia.com, vsethi@nvidia.com,
ksitaraman@nvidia.com, sanjayc@nvidia.com, mochs@nvidia.com,
bbasu@nvidia.com, stable@vger.kernel.org
Subject: Re: [PATCH] cpufreq: CPPC: Set CPPC Enable register in cpu_init
Date: Thu, 5 Nov 2026 13:22:12 +0000 [thread overview]
Message-ID: <f3d2b82b-81bc-433d-8589-2fc88822e342@arm.com> (raw)
In-Reply-To: <20261105123244.3132560-1-sumitg@nvidia.com>
On 11/5/26 12:32, Sumit Gupta wrote:
> As per ACPI 6.x s8.4.6.1.4 (CPPC Enable register):
> "If supported by the platform, OSPM writes a one to this register
> to enable CPPC on this processor. If not implemented, OSPM assumes
> the platform always has CPPC enabled."
>
> The driver never writes this register. Call cppc_set_enable() at the
> start of cppc_cpufreq_cpu_init(). Errors are logged but not fatal, as
> the register is optional.
>
> Fixes: 5477fb3bd1e8 ("ACPI / CPPC: Add a CPUFreq driver for use with CPPC")
> Cc: stable@vger.kernel.org # v6.16+
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
So apparently Nvidia GB10 has and needs this
(I guess it doesn't hurt putting this into the
commit message)
amd-pstate sets it so all good.
> ---
> Sending this separately from the autonomous mode boot parameter series
> where it was patch 1/2, as it is an independent bug fix.
> v5 of the series:
> https://lore.kernel.org/lkml/20260623080652.3353386-1-sumitg@nvidia.com/
>
> drivers/cpufreq/cppc_cpufreq.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
> index 957fa7775260..b8f4399b6e0b 100644
> --- a/drivers/cpufreq/cppc_cpufreq.c
> +++ b/drivers/cpufreq/cppc_cpufreq.c
> @@ -679,6 +679,14 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
> caps = &cpu_data->perf_caps;
> policy->driver_data = cpu_data;
>
> + /*
> + * Enable CPPC. The Enable register is optional - some platforms
> + * may not support it.
> + */
> + ret = cppc_set_enable(cpu, true);
> + if (ret && ret != -EOPNOTSUPP)
> + pr_warn("Failed to enable CPPC for CPU%u (%d)\n", cpu, ret);
> +
Any reason to not fail here?
> /*
> * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
> * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
... also I guess we need to set_enable(false) on
other failures?
It should be okay to do this only for policy->cpu AFAICS
but I guess we do need to also reenable on resume.
next prev parent reply other threads:[~2026-11-05 13:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 12:32 Sumit Gupta
2026-11-05 13:22 ` Christian Loehle [this message]
2026-11-05 16:08 ` Sumit Gupta
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