From: Sumit Gupta <sumitg@nvidia.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
<zhanjie9@hisilicon.com>, <zhenglifeng1@huawei.com>,
<christian.loehle@arm.com>, <benc@redhat.com>,
<linux-pm@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <treding@nvidia.com>, <jonathanh@nvidia.com>, <vsethi@nvidia.com>,
<ksitaraman@nvidia.com>, <sanjayc@nvidia.com>, <mochs@nvidia.com>,
<bbasu@nvidia.com>, <sumitg@nvidia.com>, <stable@vger.kernel.org>
Subject: [PATCH] cpufreq: CPPC: Set CPPC Enable register in cpu_init
Date: Thu, 5 Nov 2026 18:02:44 +0530 [thread overview]
Message-ID: <20261105123244.3132560-1-sumitg@nvidia.com> (raw)
As per ACPI 6.x s8.4.6.1.4 (CPPC Enable register):
"If supported by the platform, OSPM writes a one to this register
to enable CPPC on this processor. If not implemented, OSPM assumes
the platform always has CPPC enabled."
The driver never writes this register. Call cppc_set_enable() at the
start of cppc_cpufreq_cpu_init(). Errors are logged but not fatal, as
the register is optional.
Fixes: 5477fb3bd1e8 ("ACPI / CPPC: Add a CPUFreq driver for use with CPPC")
Cc: stable@vger.kernel.org # v6.16+
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
Sending this separately from the autonomous mode boot parameter series
where it was patch 1/2, as it is an independent bug fix.
v5 of the series:
https://lore.kernel.org/lkml/20260623080652.3353386-1-sumitg@nvidia.com/
drivers/cpufreq/cppc_cpufreq.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 957fa7775260..b8f4399b6e0b 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -679,6 +679,14 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
caps = &cpu_data->perf_caps;
policy->driver_data = cpu_data;
+ /*
+ * Enable CPPC. The Enable register is optional - some platforms
+ * may not support it.
+ */
+ ret = cppc_set_enable(cpu, true);
+ if (ret && ret != -EOPNOTSUPP)
+ pr_warn("Failed to enable CPPC for CPU%u (%d)\n", cpu, ret);
+
/*
* Set min to lowest nonlinear perf to avoid any efficiency penalty (see
* Section 8.4.7.1.1.5 of ACPI 6.1 spec)
--
2.34.1
next reply other threads:[~2026-11-05 12:33 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 12:32 Sumit Gupta [this message]
2026-11-05 13:22 ` Christian Loehle
2026-11-05 16:08 ` Sumit Gupta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261105123244.3132560-1-sumitg@nvidia.com \
--to=sumitg@nvidia.com \
--cc=bbasu@nvidia.com \
--cc=benc@redhat.com \
--cc=christian.loehle@arm.com \
--cc=jonathanh@nvidia.com \
--cc=ksitaraman@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mochs@nvidia.com \
--cc=rafael@kernel.org \
--cc=sanjayc@nvidia.com \
--cc=stable@vger.kernel.org \
--cc=treding@nvidia.com \
--cc=viresh.kumar@linaro.org \
--cc=vsethi@nvidia.com \
--cc=zhanjie9@hisilicon.com \
--cc=zhenglifeng1@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®