From: John Garry <john.garry@huawei.com>
To: Ganapatrao Kulkarni <gklkml16@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>,
Shaokun Zhang <zhangshaokun@hisilicon.com>,
Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>,
<linux-kernel@vger.kernel.org>, Linuxarm <linuxarm@huawei.com>,
<jonathan.cameron@huawei.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
"Arnaldo Carvalho de Melo" <acme@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Subject: Re: [PATCH] perf vendor events arm64: Add hip08 implementation defined PMU core events
Date: Thu, 19 Oct 2017 11:29:04 +0100 [thread overview]
Message-ID: <f698b4dc-be65-9911-9dee-6f2534c0ab83@huawei.com> (raw)
In-Reply-To: <CAKTKpr71Ec3SLomPu_C1vsqPbjN4BgC973DKwYN7b4QE0ezDzA@mail.gmail.com>
>>
>> #Family-model,Version,Filename,EventType
>> 0x00000000420f5160,v1,cavium,core
>> 0x00000000420f5161,v1,cavium,core
>
> certainly, there is Part number(PartNum, bits [15:4] ) change from
> thunderx2 to thunderx3.
> thunderx3 should have its own json file describing all its supported events.
> same applies to other SoCs as well.
>
> IIUC, the idea of ignoring Revision and Variants is that, the PMU
> design/version wont change across Revisions and Variants.
>
Hi Ganapatrao,
Right, I should have modified the part num for my illustration, but I am
still concerned. Please see my example in the other mail and check what
I am missing.
Thanks,
John
next prev parent reply other threads:[~2017-10-19 10:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-17 7:01 Shaokun Zhang
2017-10-17 12:59 ` Will Deacon
2017-10-18 9:25 ` John Garry
2017-10-18 10:49 ` Will Deacon
2017-10-18 16:37 ` John Garry
2017-10-18 17:04 ` Will Deacon
2017-10-19 9:20 ` John Garry
2017-10-18 17:20 ` Ganapatrao Kulkarni
2017-10-19 10:29 ` John Garry [this message]
2017-10-25 10:06 ` Ganapatrao Kulkarni
2017-10-25 11:07 ` John Garry
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