* [PATCH 1/7] drm/msm/dsi_phy_10nm: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
2025-07-11 10:07 ` Konrad Dybcio
2025-07-10 16:27 ` [PATCH 2/7] drm/msm/dsi_phy_14nm: " Brian Masney
` (5 subsequent siblings)
6 siblings, 1 reply; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
index af2e30f3f842a0157f161172bfe42059cabe6a8a..d9848b5849836a75f8f6b983d96f8901d06a5dd3 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
@@ -444,21 +444,21 @@ static unsigned long dsi_pll_10nm_vco_recalc_rate(struct clk_hw *hw,
return (unsigned long)vco_rate;
}
-static long dsi_pll_10nm_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static int dsi_pll_10nm_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct dsi_pll_10nm *pll_10nm = to_pll_10nm(hw);
- if (rate < pll_10nm->phy->cfg->min_pll_rate)
- return pll_10nm->phy->cfg->min_pll_rate;
- else if (rate > pll_10nm->phy->cfg->max_pll_rate)
- return pll_10nm->phy->cfg->max_pll_rate;
- else
- return rate;
+ if (req->rate < pll_10nm->phy->cfg->min_pll_rate)
+ req->rate = pll_10nm->phy->cfg->min_pll_rate;
+ else if (req->rate > pll_10nm->phy->cfg->max_pll_rate)
+ req->rate = pll_10nm->phy->cfg->max_pll_rate;
+
+ return 0;
}
static const struct clk_ops clk_ops_dsi_pll_10nm_vco = {
- .round_rate = dsi_pll_10nm_clk_round_rate,
+ .determine_rate = dsi_pll_10nm_clk_determine_rate,
.set_rate = dsi_pll_10nm_vco_set_rate,
.recalc_rate = dsi_pll_10nm_vco_recalc_rate,
.prepare = dsi_pll_10nm_vco_prepare,
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 1/7] drm/msm/dsi_phy_10nm: convert from round_rate() to determine_rate()
2025-07-10 16:27 ` [PATCH 1/7] drm/msm/dsi_phy_10nm: convert from " Brian Masney
@ 2025-07-11 10:07 ` Konrad Dybcio
0 siblings, 0 replies; 9+ messages in thread
From: Konrad Dybcio @ 2025-07-11 10:07 UTC (permalink / raw)
To: Brian Masney, Rob Clark, Dmitry Baryshkov, Abhinav Kumar,
Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie,
Simona Vetter, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel
On 7/10/25 6:27 PM, Brian Masney wrote:
> The round_rate() clk ops is deprecated, so migrate this driver from
> round_rate() to determine_rate() using the Coccinelle semantic patch
> on the cover letter of this series.
>
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> index af2e30f3f842a0157f161172bfe42059cabe6a8a..d9848b5849836a75f8f6b983d96f8901d06a5dd3 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> @@ -444,21 +444,21 @@ static unsigned long dsi_pll_10nm_vco_recalc_rate(struct clk_hw *hw,
> return (unsigned long)vco_rate;
> }
>
> -static long dsi_pll_10nm_clk_round_rate(struct clk_hw *hw,
> - unsigned long rate, unsigned long *parent_rate)
> +static int dsi_pll_10nm_clk_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> {
> struct dsi_pll_10nm *pll_10nm = to_pll_10nm(hw);
>
> - if (rate < pll_10nm->phy->cfg->min_pll_rate)
> - return pll_10nm->phy->cfg->min_pll_rate;
> - else if (rate > pll_10nm->phy->cfg->max_pll_rate)
> - return pll_10nm->phy->cfg->max_pll_rate;
> - else
> - return rate;
> + if (req->rate < pll_10nm->phy->cfg->min_pll_rate)
> + req->rate = pll_10nm->phy->cfg->min_pll_rate;
> + else if (req->rate > pll_10nm->phy->cfg->max_pll_rate)
> + req->rate = pll_10nm->phy->cfg->max_pll_rate;
clamp_t() smells better for this series
Konrad
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/7] drm/msm/dsi_phy_14nm: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
2025-07-10 16:27 ` [PATCH 1/7] drm/msm/dsi_phy_10nm: convert from " Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
2025-07-10 16:27 ` [PATCH 3/7] drm/msm/dsi_phy_28nm_8960: " Brian Masney
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 36 ++++++++++++++++--------------
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
index 3a1c8ece6657c988cfb0c26af39b5d145bc576f8..4bc9b7e44ce775f676fc89cf4565adeb309f0177 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
@@ -578,21 +578,21 @@ static void dsi_pll_14nm_vco_unprepare(struct clk_hw *hw)
pll_14nm->phy->pll_on = false;
}
-static long dsi_pll_14nm_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static int dsi_pll_14nm_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct dsi_pll_14nm *pll_14nm = to_pll_14nm(hw);
- if (rate < pll_14nm->phy->cfg->min_pll_rate)
- return pll_14nm->phy->cfg->min_pll_rate;
- else if (rate > pll_14nm->phy->cfg->max_pll_rate)
- return pll_14nm->phy->cfg->max_pll_rate;
- else
- return rate;
+ if (req->rate < pll_14nm->phy->cfg->min_pll_rate)
+ req->rate = pll_14nm->phy->cfg->min_pll_rate;
+ else if (req->rate > pll_14nm->phy->cfg->max_pll_rate)
+ req->rate = pll_14nm->phy->cfg->max_pll_rate;
+
+ return 0;
}
static const struct clk_ops clk_ops_dsi_pll_14nm_vco = {
- .round_rate = dsi_pll_14nm_clk_round_rate,
+ .determine_rate = dsi_pll_14nm_clk_determine_rate,
.set_rate = dsi_pll_14nm_vco_set_rate,
.recalc_rate = dsi_pll_14nm_vco_recalc_rate,
.prepare = dsi_pll_14nm_vco_prepare,
@@ -622,18 +622,20 @@ static unsigned long dsi_pll_14nm_postdiv_recalc_rate(struct clk_hw *hw,
postdiv->flags, width);
}
-static long dsi_pll_14nm_postdiv_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *prate)
+static int dsi_pll_14nm_postdiv_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct dsi_pll_14nm_postdiv *postdiv = to_pll_14nm_postdiv(hw);
struct dsi_pll_14nm *pll_14nm = postdiv->pll;
- DBG("DSI%d PLL parent rate=%lu", pll_14nm->phy->id, rate);
+ DBG("DSI%d PLL parent rate=%lu", pll_14nm->phy->id, req->rate);
- return divider_round_rate(hw, rate, prate, NULL,
- postdiv->width,
- postdiv->flags);
+ req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,
+ NULL,
+ postdiv->width,
+ postdiv->flags);
+
+ return 0;
}
static int dsi_pll_14nm_postdiv_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -680,7 +682,7 @@ static int dsi_pll_14nm_postdiv_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops clk_ops_dsi_pll_14nm_postdiv = {
.recalc_rate = dsi_pll_14nm_postdiv_recalc_rate,
- .round_rate = dsi_pll_14nm_postdiv_round_rate,
+ .determine_rate = dsi_pll_14nm_postdiv_determine_rate,
.set_rate = dsi_pll_14nm_postdiv_set_rate,
};
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 3/7] drm/msm/dsi_phy_28nm_8960: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
2025-07-10 16:27 ` [PATCH 1/7] drm/msm/dsi_phy_10nm: convert from " Brian Masney
2025-07-10 16:27 ` [PATCH 2/7] drm/msm/dsi_phy_14nm: " Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
2025-07-10 16:27 ` [PATCH 4/7] drm/msm/dsi_phy_28nm: " Brian Masney
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 34 +++++++++++++------------
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
index f3643320ff2f2bae5301bb94f1fe19fa03db584c..8d234685c1aa3d4579e3dc766c000de1909f87f6 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
@@ -231,21 +231,21 @@ static void dsi_pll_28nm_vco_unprepare(struct clk_hw *hw)
pll_28nm->phy->pll_on = false;
}
-static long dsi_pll_28nm_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static int dsi_pll_28nm_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct dsi_pll_28nm *pll_28nm = to_pll_28nm(hw);
- if (rate < pll_28nm->phy->cfg->min_pll_rate)
- return pll_28nm->phy->cfg->min_pll_rate;
- else if (rate > pll_28nm->phy->cfg->max_pll_rate)
- return pll_28nm->phy->cfg->max_pll_rate;
- else
- return rate;
+ if (req->rate < pll_28nm->phy->cfg->min_pll_rate)
+ req->rate = pll_28nm->phy->cfg->min_pll_rate;
+ else if (req->rate > pll_28nm->phy->cfg->max_pll_rate)
+ req->rate = pll_28nm->phy->cfg->max_pll_rate;
+
+ return 0;
}
static const struct clk_ops clk_ops_dsi_pll_28nm_vco = {
- .round_rate = dsi_pll_28nm_clk_round_rate,
+ .determine_rate = dsi_pll_28nm_clk_determine_rate,
.set_rate = dsi_pll_28nm_clk_set_rate,
.recalc_rate = dsi_pll_28nm_clk_recalc_rate,
.prepare = dsi_pll_28nm_vco_prepare,
@@ -296,18 +296,20 @@ static unsigned int get_vco_mul_factor(unsigned long byte_clk_rate)
return 8;
}
-static long clk_bytediv_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *prate)
+static int clk_bytediv_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
unsigned long best_parent;
unsigned int factor;
- factor = get_vco_mul_factor(rate);
+ factor = get_vco_mul_factor(req->rate);
+
+ best_parent = req->rate * factor;
+ req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
- best_parent = rate * factor;
- *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
+ req->rate = req->best_parent_rate / factor;
- return *prate / factor;
+ return 0;
}
static int clk_bytediv_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -328,7 +330,7 @@ static int clk_bytediv_set_rate(struct clk_hw *hw, unsigned long rate,
/* Our special byte clock divider ops */
static const struct clk_ops clk_bytediv_ops = {
- .round_rate = clk_bytediv_round_rate,
+ .determine_rate = clk_bytediv_determine_rate,
.set_rate = clk_bytediv_set_rate,
.recalc_rate = clk_bytediv_recalc_rate,
};
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 4/7] drm/msm/dsi_phy_28nm: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
` (2 preceding siblings ...)
2025-07-10 16:27 ` [PATCH 3/7] drm/msm/dsi_phy_28nm_8960: " Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
2025-07-10 16:27 ` [PATCH 5/7] drm/msm/dsi_phy_7nm: " Brian Masney
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
index 90348a2af3e9dac72924561b23b169a268abc3b0..6f500f6ac72813b542775e392680499f2eea6df5 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
@@ -533,21 +533,21 @@ static void dsi_pll_28nm_vco_unprepare(struct clk_hw *hw)
pll_28nm->phy->pll_on = false;
}
-static long dsi_pll_28nm_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static int dsi_pll_28nm_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct dsi_pll_28nm *pll_28nm = to_pll_28nm(hw);
- if (rate < pll_28nm->phy->cfg->min_pll_rate)
- return pll_28nm->phy->cfg->min_pll_rate;
- else if (rate > pll_28nm->phy->cfg->max_pll_rate)
- return pll_28nm->phy->cfg->max_pll_rate;
- else
- return rate;
+ if (req->rate < pll_28nm->phy->cfg->min_pll_rate)
+ req->rate = pll_28nm->phy->cfg->min_pll_rate;
+ else if (req->rate > pll_28nm->phy->cfg->max_pll_rate)
+ req->rate = pll_28nm->phy->cfg->max_pll_rate;
+
+ return 0;
}
static const struct clk_ops clk_ops_dsi_pll_28nm_vco_hpm = {
- .round_rate = dsi_pll_28nm_clk_round_rate,
+ .determine_rate = dsi_pll_28nm_clk_determine_rate,
.set_rate = dsi_pll_28nm_clk_set_rate,
.recalc_rate = dsi_pll_28nm_clk_recalc_rate,
.prepare = dsi_pll_28nm_vco_prepare_hpm,
@@ -556,7 +556,7 @@ static const struct clk_ops clk_ops_dsi_pll_28nm_vco_hpm = {
};
static const struct clk_ops clk_ops_dsi_pll_28nm_vco_lp = {
- .round_rate = dsi_pll_28nm_clk_round_rate,
+ .determine_rate = dsi_pll_28nm_clk_determine_rate,
.set_rate = dsi_pll_28nm_clk_set_rate,
.recalc_rate = dsi_pll_28nm_clk_recalc_rate,
.prepare = dsi_pll_28nm_vco_prepare_lp,
@@ -565,7 +565,7 @@ static const struct clk_ops clk_ops_dsi_pll_28nm_vco_lp = {
};
static const struct clk_ops clk_ops_dsi_pll_28nm_vco_8226 = {
- .round_rate = dsi_pll_28nm_clk_round_rate,
+ .determine_rate = dsi_pll_28nm_clk_determine_rate,
.set_rate = dsi_pll_28nm_clk_set_rate,
.recalc_rate = dsi_pll_28nm_clk_recalc_rate,
.prepare = dsi_pll_28nm_vco_prepare_8226,
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 5/7] drm/msm/dsi_phy_7nm: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
` (3 preceding siblings ...)
2025-07-10 16:27 ` [PATCH 4/7] drm/msm/dsi_phy_28nm: " Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
2025-07-10 16:27 ` [PATCH 6/7] drm/msm/hdmi_phy_8996: " Brian Masney
2025-07-10 16:27 ` [PATCH 7/7] drm/msm/hdmi_phy_8998: " Brian Masney
6 siblings, 0 replies; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
index 8c98f91a5930c9f2563a6b4824690ceef56987c0..eecc4e2ed51547709f9643c52eb2468f17966de8 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
@@ -561,21 +561,21 @@ static unsigned long dsi_pll_7nm_vco_recalc_rate(struct clk_hw *hw,
return (unsigned long)vco_rate;
}
-static long dsi_pll_7nm_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static int dsi_pll_7nm_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct dsi_pll_7nm *pll_7nm = to_pll_7nm(hw);
- if (rate < pll_7nm->phy->cfg->min_pll_rate)
- return pll_7nm->phy->cfg->min_pll_rate;
- else if (rate > pll_7nm->phy->cfg->max_pll_rate)
- return pll_7nm->phy->cfg->max_pll_rate;
- else
- return rate;
+ if (req->rate < pll_7nm->phy->cfg->min_pll_rate)
+ req->rate = pll_7nm->phy->cfg->min_pll_rate;
+ else if (req->rate > pll_7nm->phy->cfg->max_pll_rate)
+ req->rate = pll_7nm->phy->cfg->max_pll_rate;
+
+ return 0;
}
static const struct clk_ops clk_ops_dsi_pll_7nm_vco = {
- .round_rate = dsi_pll_7nm_clk_round_rate,
+ .determine_rate = dsi_pll_7nm_clk_determine_rate,
.set_rate = dsi_pll_7nm_vco_set_rate,
.recalc_rate = dsi_pll_7nm_vco_recalc_rate,
.prepare = dsi_pll_7nm_vco_prepare,
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 6/7] drm/msm/hdmi_phy_8996: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
` (4 preceding siblings ...)
2025-07-10 16:27 ` [PATCH 5/7] drm/msm/dsi_phy_7nm: " Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
2025-07-10 16:27 ` [PATCH 7/7] drm/msm/hdmi_phy_8998: " Brian Masney
6 siblings, 0 replies; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
index 8c8d80b59573a37a4008752b16e094a218802508..dd59b2ed7fa3f53b6a70d20925e4f9cbd5d0573c 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
@@ -629,16 +629,15 @@ static int hdmi_8996_pll_prepare(struct clk_hw *hw)
return 0;
}
-static long hdmi_8996_pll_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *parent_rate)
+static int hdmi_8996_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
- if (rate < HDMI_PCLK_MIN_FREQ)
- return HDMI_PCLK_MIN_FREQ;
- else if (rate > HDMI_PCLK_MAX_FREQ)
- return HDMI_PCLK_MAX_FREQ;
- else
- return rate;
+ if (req->rate < HDMI_PCLK_MIN_FREQ)
+ req->rate = HDMI_PCLK_MIN_FREQ;
+ else if (req->rate > HDMI_PCLK_MAX_FREQ)
+ req->rate = HDMI_PCLK_MAX_FREQ;
+
+ return 0;
}
static unsigned long hdmi_8996_pll_recalc_rate(struct clk_hw *hw,
@@ -684,7 +683,7 @@ static int hdmi_8996_pll_is_enabled(struct clk_hw *hw)
static const struct clk_ops hdmi_8996_pll_ops = {
.set_rate = hdmi_8996_pll_set_clk_rate,
- .round_rate = hdmi_8996_pll_round_rate,
+ .determine_rate = hdmi_8996_pll_determine_rate,
.recalc_rate = hdmi_8996_pll_recalc_rate,
.prepare = hdmi_8996_pll_prepare,
.unprepare = hdmi_8996_pll_unprepare,
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 7/7] drm/msm/hdmi_phy_8998: convert from round_rate() to determine_rate()
2025-07-10 16:27 [PATCH 0/7] drm/msm/dsi/phy: convert from clk round_rate() to determine_rate() Brian Masney
` (5 preceding siblings ...)
2025-07-10 16:27 ` [PATCH 6/7] drm/msm/hdmi_phy_8996: " Brian Masney
@ 2025-07-10 16:27 ` Brian Masney
6 siblings, 0 replies; 9+ messages in thread
From: Brian Masney @ 2025-07-10 16:27 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
index 33bb48ae58a2da13b7e90ff419c6e05fec1466af..7d6381553eb8cb5b18b898a734d928d34f98ebb0 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
@@ -646,16 +646,15 @@ static int hdmi_8998_pll_prepare(struct clk_hw *hw)
return 0;
}
-static long hdmi_8998_pll_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *parent_rate)
+static int hdmi_8998_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
- if (rate < HDMI_PCLK_MIN_FREQ)
- return HDMI_PCLK_MIN_FREQ;
- else if (rate > HDMI_PCLK_MAX_FREQ)
- return HDMI_PCLK_MAX_FREQ;
- else
- return rate;
+ if (req->rate < HDMI_PCLK_MIN_FREQ)
+ req->rate = HDMI_PCLK_MIN_FREQ;
+ else if (req->rate > HDMI_PCLK_MAX_FREQ)
+ req->rate = HDMI_PCLK_MAX_FREQ;
+
+ return 0;
}
static unsigned long hdmi_8998_pll_recalc_rate(struct clk_hw *hw,
@@ -688,7 +687,7 @@ static int hdmi_8998_pll_is_enabled(struct clk_hw *hw)
static const struct clk_ops hdmi_8998_pll_ops = {
.set_rate = hdmi_8998_pll_set_clk_rate,
- .round_rate = hdmi_8998_pll_round_rate,
+ .determine_rate = hdmi_8998_pll_determine_rate,
.recalc_rate = hdmi_8998_pll_recalc_rate,
.prepare = hdmi_8998_pll_prepare,
.unprepare = hdmi_8998_pll_unprepare,
--
2.50.0
^ permalink raw reply [flat|nested] 9+ messages in thread